Cross Reference: /drivers/mmc/host/sdricoh

Lines Matching refs:host
38 #include <linux/mmc/host.h>
102 static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
105 	unsigned int value = readl(host->iobase + reg);
106 	dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
110 static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
113 	writel(value, host->iobase + reg);
114 	dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
118 static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
121 	unsigned int value = readw(host->iobase + reg);
122 	dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
126 static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
129 	writew(value, host->iobase + reg);
130 	dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
133 static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
136 	unsigned int value = readb(host->iobase + reg);
137 	dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
141 static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
145 	struct device *dev = host->dev;
147 		status = sdricoh_readl(host, R21C_STATUS);
148 		sdricoh_writel(host, R2E4_STATUS_RESP, status);
167 static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
174 	sdricoh_writel(host, R21C_STATUS, 0x18);
176 	sdricoh_writel(host, R204_CMD_ARG, arg);
177 	sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
181 			status = sdricoh_readl(host, R21C_STATUS);
182 			sdricoh_writel(host, R2E4_STATUS_RESP, status);
198 static int sdricoh_reset(struct sdricoh_host *host)
200 	dev_dbg(host->dev, "reset\n");
201 	sdricoh_writel(host, R2F0_RESET, 0x10001);
202 	sdricoh_writel(host, R2E0_INIT, 0x10000);
203 	if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
205 	sdricoh_writel(host, R2E0_INIT, 0x10007);
207 	sdricoh_writel(host, R224_MODE, 0x2000000);
208 	sdricoh_writel(host, R228_POWER, 0xe0);
212 	sdricoh_writel(host, R21C_STATUS, 0x18);
217 static int sdricoh_blockio(struct sdricoh_host *host, int read,
224 		if (sdricoh_query_status(host, STATUS_READY_TO_READ,
227 		sdricoh_writel(host, R21C_STATUS, 0x18);
230 			data = sdricoh_readl(host, R230_DATA);
241 		if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
244 		sdricoh_writel(host, R21C_STATUS, 0x18);
255 			sdricoh_writel(host, R230_DATA, data);
267 	struct sdricoh_host *host = mmc_priv(mmc);
270 	struct device *dev = host->dev;
277 	sdricoh_writel(host, R21C_STATUS, 0x18);
280 	if (host->app_cmd) {
282 		host->app_cmd = 0;
284 		host->app_cmd = 1;
288 		sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
289 		sdricoh_writel(host, R208_DATAIO, 0);
292 	cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
300 				    sdricoh_readl(host,
304 					    sdricoh_readb(host, R20C_RESP +
308 			cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
318 		sdricoh_writel(host, R21C_STATUS, 0x837f031e);
328 				sdricoh_blockio(host,
341 		sdricoh_writel(host, R208_DATAIO, 1);
343 		if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
357 	struct sdricoh_host *host = mmc_priv(mmc);
358 	dev_dbg(host->dev, "set_ios\n");
361 		sdricoh_writel(host, R228_POWER, 0xc0e0);
364 			sdricoh_writel(host, R224_MODE, 0x2000300);
365 			sdricoh_writel(host, R228_POWER, 0x40e0);
367 			sdricoh_writel(host, R224_MODE, 0x2000340);
371 		sdricoh_writel(host, R224_MODE, 0x2000320);
372 		sdricoh_writel(host, R228_POWER, 0xe0);
378 	struct sdricoh_host *host = mmc_priv(mmc);
381 	status = sdricoh_readl(host, R21C_STATUS);
382 	sdricoh_writel(host, R2E4_STATUS_RESP, status);
404 	struct sdricoh_host *host = NULL;
432 	host = mmc_priv(mmc);
434 	host->iobase = iobase;
435 	host->dev = dev;
436 	host->pci_dev = pci_dev;
451 	if (sdricoh_reset(host)) {
461 		dev_dbg(dev, "mmc host registered\n");
504 	/* remove mmc host */
506 		struct sdricoh_host *host = mmc_priv(mmc);
508 		pci_iounmap(host->pci_dev, host->iobase);
509 		pci_dev_put(host->pci_dev);