Cross Reference: /drivers/mtd/nand/jz4740

Lines Matching refs:nand
23 #include <linux/mtd/nand.h>
83 	struct jz_nand *nand = mtd_to_jz_nand(mtd);
88 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
94 		banknr = nand->banks[chipnr] - 1;
95 		chip->IO_ADDR_R = nand->bank_base[banknr];
96 		chip->IO_ADDR_W = nand->bank_base[banknr];
98 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
100 	nand->selected_bank = banknr;
105 	struct jz_nand *nand = mtd_to_jz_nand(mtd);
108 	void __iomem *bank_base = nand->bank_base[nand->selected_bank];
110 	BUG_ON(nand->selected_bank < 0);
120 		reg = readl(nand->base + JZ_REG_NAND_CTRL);
122 			reg |= JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);
124 			reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);
125 		writel(reg, nand->base + JZ_REG_NAND_CTRL);
133 	struct jz_nand *nand = mtd_to_jz_nand(mtd);
134 	return gpio_get_value_cansleep(nand->pdata->busy_gpio);
139 	struct jz_nand *nand = mtd_to_jz_nand(mtd);
142 	writel(0, nand->base + JZ_REG_NAND_IRQ_STAT);
143 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
152 		nand->is_reading = true;
156 		nand->is_reading = false;
162 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
168 	struct jz_nand *nand = mtd_to_jz_nand(mtd);
175 	if (nand->is_reading)
179 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);
185 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
187 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
190 		ecc_code[i] = readb(nand->base + JZ_REG_NAND_PAR0 + i);
221 	struct jz_nand *nand = mtd_to_jz_nand(mtd);
234 		t &= dat[nand->chip.ecc.size / 2];
235 		t &= dat[nand->chip.ecc.size - 1];
238 			for (i = 1; i < nand->chip.ecc.size - 1; ++i)
246 		writeb(read_ecc[i], nand->base + JZ_REG_NAND_PAR0 + i);
248 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
250 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
253 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);
259 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
261 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
270 			error = readl(nand->base + JZ_REG_NAND_ERR(i));
327 			       struct jz_nand *nand, unsigned char bank,
336 	struct mtd_info *mtd = &nand->mtd;
337 	struct nand_chip *chip = &nand->chip;
353 					&nand->bank_mem[bank - 1],
354 					&nand->bank_base[bank - 1]);
360 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
362 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
398 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
400 	jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
401 				 nand->bank_base[bank - 1]);
411 	struct jz_nand *nand;
418 	nand = kzalloc(sizeof(*nand), GFP_KERNEL);
419 	if (!nand)
422 	ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);
436 	mtd		= &nand->mtd;
437 	chip		= &nand->chip;
440 	mtd->name	= "jz4740-nand";
460 	nand->pdata = pdata;
461 	platform_set_drvdata(pdev, nand);
487 		 * jz_nand_select_chip(), so nand->banks has to contain the
490 		nand->banks[chipnr] = bank;
491 		if (jz_nand_detect_bank(pdev, nand, bank, chipnr,
495 			nand->banks[chipnr] = 0;
530 		unsigned char bank = nand->banks[chipnr];
532 		jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
533 					 nand->bank_base[bank - 1]);
535 	writel(0, nand->base + JZ_REG_NAND_CTRL);
540 	jz_nand_iounmap_resource(nand->mem, nand->base);
542 	kfree(nand);
548 	struct jz_nand *nand = platform_get_drvdata(pdev);
552 	nand_release(&nand->mtd);
555 	writel(0, nand->base + JZ_REG_NAND_CTRL);
558 		unsigned char bank = nand->banks[i];
560 			jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
561 						 nand->bank_base[bank - 1]);
568 	jz_nand_iounmap_resource(nand->mem, nand->base);
570 	kfree(nand);
579 		.name = "jz4740-nand",
589 MODULE_ALIAS("platform:jz4740-nand");