Cross Reference: /drivers/net/ethernet/agere/et131x.c

Lines Matching refs:rxdma
755 	writel(csr, &adapter->regs->rxdma.csr);
757 	csr = readl(&adapter->regs->rxdma.csr);
760 		csr = readl(&adapter->regs->rxdma.csr);
774 	       &adapter->regs->rxdma.csr);
775 	csr = readl(&adapter->regs->rxdma.csr);
778 		csr = readl(&adapter->regs->rxdma.csr);
1541 	struct rxdma_regs __iomem *rx_dma = &adapter->regs->rxdma;
2120 		writel(0, &adapter->regs->rxdma.max_pkt_time);
2121 		writel(1, &adapter->regs->rxdma.num_pkt_done);
2129 	struct rxdma_regs __iomem *rx_dma = &adapter->regs->rxdma;
2234 	writel(rx_local->local_psr_full, &adapter->regs->rxdma.psr_full_offset);
2939 	regs_buff[num++] = readl(&aregs->rxdma.csr);
2940 	regs_buff[num++] = readl(&aregs->rxdma.dma_wb_base_hi);
2941 	regs_buff[num++] = readl(&aregs->rxdma.dma_wb_base_lo);
2942 	regs_buff[num++] = readl(&aregs->rxdma.num_pkt_done);
2943 	regs_buff[num++] = readl(&aregs->rxdma.max_pkt_time);
2944 	regs_buff[num++] = readl(&aregs->rxdma.rxq_rd_addr);
2945 	regs_buff[num++] = readl(&aregs->rxdma.rxq_rd_addr_ext);
2946 	regs_buff[num++] = readl(&aregs->rxdma.rxq_wr_addr);
2947 	regs_buff[num++] = readl(&aregs->rxdma.psr_base_hi);
2948 	regs_buff[num++] = readl(&aregs->rxdma.psr_base_lo);
2949 	regs_buff[num++] = readl(&aregs->rxdma.psr_num_des);
2950 	regs_buff[num++] = readl(&aregs->rxdma.psr_avail_offset);
2951 	regs_buff[num++] = readl(&aregs->rxdma.psr_full_offset);
2952 	regs_buff[num++] = readl(&aregs->rxdma.psr_access_index);
2953 	regs_buff[num++] = readl(&aregs->rxdma.psr_min_des);
2954 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_base_lo);
2955 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_base_hi);
2956 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_num_des);
2957 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_avail_offset);
2958 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_full_offset);
2959 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_rd_index);
2960 	regs_buff[num++] = readl(&aregs->rxdma.fbr0_min_des);
2961 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_base_lo);
2962 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_base_hi);
2963 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_num_des);
2964 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_avail_offset);
2965 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_full_offset);
2966 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_rd_index);
2967 	regs_buff[num++] = readl(&aregs->rxdma.fbr1_min_des);