Cross Reference: /drivers/net/ethernet/allwinner/sun4i-emac.c

Lines Matching refs:membase
71 	void __iomem		*membase;
94 	reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
98 	writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);
107 	reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
111 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
192 	writel(0, db->membase + EMAC_CTL_REG);
194 	writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);
266 	reg_val = readl(db->membase + EMAC_TX_MODE_REG);
269 		db->membase + EMAC_TX_MODE_REG);
273 	reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
276 		db->membase + EMAC_MAC_CTL0_REG);
279 	reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
283 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
286 	writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);
290 		db->membase + EMAC_MAC_IPGR_REG);
294 		db->membase + EMAC_MAC_CLRT_REG);
298 		db->membase + EMAC_MAC_MAXF_REG);
309 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
320 		db->membase + EMAC_RX_CTL_REG);
330 	reg_val = readl(db->membase + EMAC_RX_CTL_REG);
332 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);
337 	reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
339 	writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);
342 	reg_val = readl(db->membase + EMAC_MAC_MCFG_REG);
345 	writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);
348 	writel(0x0, db->membase + EMAC_RX_FBC_REG);
351 	writel(0, db->membase + EMAC_INT_CTL_REG);
352 	reg_val = readl(db->membase + EMAC_INT_STA_REG);
353 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
362 	       dev_addr[2], db->membase + EMAC_MAC_A1_REG);
364 	       dev_addr[5], db->membase + EMAC_MAC_A0_REG);
382 	       dev_addr[2], db->membase + EMAC_MAC_A1_REG);
384 	       dev_addr[5], db->membase + EMAC_MAC_A0_REG);
402 	reg_val = readl(db->membase + EMAC_CTL_REG);
404 		db->membase + EMAC_CTL_REG);
407 	reg_val = readl(db->membase + EMAC_INT_CTL_REG);
409 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);
454 	writel(channel, db->membase + EMAC_TX_INS_REG);
456 	emac_outblk_32bit(db->membase + EMAC_TX_IO_DATA_REG,
464 		writel(skb->len, db->membase + EMAC_TX_PL0_REG);
466 		writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,
467 		       db->membase + EMAC_TX_CTL0_REG);
473 		writel(skb->len, db->membase + EMAC_TX_PL1_REG);
475 		writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,
476 		       db->membase + EMAC_TX_CTL1_REG);
532 		rxcount = readl(db->membase + EMAC_RX_FBC_REG);
548 			reg_val = readl(db->membase + EMAC_RX_CTL_REG);
550 			writel(reg_val, db->membase + EMAC_RX_CTL_REG);
555 			reg_val = readl(db->membase + EMAC_INT_CTL_REG);
557 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
560 			rxcount = readl(db->membase + EMAC_RX_FBC_REG);
565 		reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG);
570 			reg_val = readl(db->membase + EMAC_CTL_REG);
572 			       db->membase + EMAC_CTL_REG);
575 			reg_val = readl(db->membase + EMAC_RX_CTL_REG);
577 			       db->membase + EMAC_RX_CTL_REG);
580 				reg_val = readl(db->membase + EMAC_RX_CTL_REG);
584 			reg_val = readl(db->membase + EMAC_CTL_REG);
586 			       db->membase + EMAC_CTL_REG);
587 			reg_val = readl(db->membase + EMAC_INT_CTL_REG);
589 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);
599 		emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,
647 			emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,
673 	writel(0, db->membase + EMAC_INT_CTL_REG);
677 	int_status = readl(db->membase + EMAC_INT_STA_REG);
679 	writel(int_status, db->membase + EMAC_INT_STA_REG);
700 		reg_val = readl(db->membase + EMAC_INT_CTL_REG);
702 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);
758 	writel(0, db->membase + EMAC_INT_CTL_REG);
761 	reg_val = readl(db->membase + EMAC_INT_STA_REG);
762 	writel(reg_val, db->membase + EMAC_INT_STA_REG);
765 	reg_val = readl(db->membase + EMAC_CTL_REG);
767 	writel(reg_val, db->membase + EMAC_CTL_REG);
836 	db->membase = of_iomap(np, 0);
837 	if (!db->membase) {
844 	ndev->base_addr = (unsigned long)db->membase;
898 		 ndev->name, db->membase, ndev->irq, ndev->dev_addr);