Lines Matching defs:control
118 u32 control;
124 control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
125 AT_WRITE_REG(hw, REG_VPD_CAP, control);
129 control = AT_READ_REG(hw, REG_VPD_CAP);
130 if (control & VPD_CAP_VPD_FLAG)
133 if (control & VPD_CAP_VPD_FLAG) {
286 /* pcie flow control mode change */
292 * Configures PHY autoneg and flow control advertisement settings
319 * the 1000Base-T control Register (Address 9).
359 /* flow control fixed to enable all */
385 * Sets bit 15 and 12 of the MII control regiser (for F001 bug)