Lines Matching defs:rx_cfg

1814 	cfg_req->rx_cfg.frame_size = bna_enet_mtu_get(&rx->bna->enet);
1842 cfg_req->rx_cfg.multi_buffer =
1881 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_LARGE_SMALL;
1885 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_HDS;
1886 cfg_req->rx_cfg.hds.type = rx->hds_cfg.hdr_type;
1887 cfg_req->rx_cfg.hds.force_offset = rx->hds_cfg.forced_offset;
1888 cfg_req->rx_cfg.hds.max_header_size = rx->hds_cfg.forced_offset;
1892 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_SINGLE;
1898 cfg_req->rx_cfg.strip_vlan = rx->rxf.vlan_strip_status;
1935 bna_rx_res_check(struct bna_rx_mod *rx_mod, struct bna_rx_config *rx_cfg)
1942 if (rx_cfg->rxp_type == BNA_RXP_SINGLE) {
1943 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1944 (rx_mod->rxq_free_count < rx_cfg->num_paths))
1947 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1948 (rx_mod->rxq_free_count < (2 * rx_cfg->num_paths)))
2503 struct bna_rx_config *rx_cfg,
2532 if (!bna_rx_res_check(rx_mod, rx_cfg))
2559 rx = bna_rx_get(rx_mod, rx_cfg->rx_type);
2590 rx->num_paths = rx_cfg->num_paths;
2595 rxp->type = rx_cfg->rxp_type;
2600 if (BNA_RXP_SINGLE == rx_cfg->rxp_type)
2623 rxp->cq.ib.coalescing_timeo = rx_cfg->coalescing_timeo;
2637 q0->rcb->q_depth = rx_cfg->q0_depth;
2638 q0->q_depth = rx_cfg->q0_depth;
2639 q0->multi_buffer = rx_cfg->q0_multi_buf;
2640 q0->buffer_size = rx_cfg->q0_buf_size;
2641 q0->num_vecs = rx_cfg->q0_num_vecs;
2663 q1->rcb->q_depth = rx_cfg->q1_depth;
2664 q1->q_depth = rx_cfg->q1_depth;
2670 q1->buffer_size = (rx_cfg->rxp_type == BNA_RXP_HDS) ?
2671 rx_cfg->hds_config.forced_offset
2672 : rx_cfg->q1_buf_size;
2687 cq_depth = rx_cfg->q0_depth +
2688 ((rx_cfg->rxp_type == BNA_RXP_SINGLE) ?
2689 0 : rx_cfg->q1_depth);
2721 rx->hds_cfg = rx_cfg->hds_config;
2723 bna_rxf_init(&rx->rxf, rx, rx_cfg, res_info);