Lines Matching refs:queue
357 /* Max number of Tx descriptors in each aggregated queue */
738 u8 phys_txq; /* destination queue ID */
761 /* Per-CPU Tx queue control */
787 /* Physical number of this Tx queue */
790 /* Logical number of this Tx queue */
821 /* RX queue number, in the range 0-31 for physical RXQs */
3314 /* Set initial CPU queue for receiving packets */
3325 /* Set CPU queue number for oversize packets */
3495 /* Get queue physical ID */
3513 /* Get queue physical ID */
3920 int tx_port_num, val, queue, ptxq, lrxq;
3940 for (queue = 0; queue < MVPP2_MAX_TXQ; queue++) {
3941 ptxq = mvpp2_txq_phys(port->id, queue);
3966 queue = port->rxqs[lrxq]->id;
3967 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(queue));
3970 mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(queue), val);
3981 int lrxq, queue;
3984 queue = port->rxqs[lrxq]->id;
3985 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(queue));
3987 mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(queue), val);
3994 int lrxq, queue;
3997 queue = port->rxqs[lrxq]->id;
3998 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(queue));
4000 mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(queue), val);
4004 /* Enable transmit via physical egress queue
4010 int queue;
4015 for (queue = 0; queue < txq_number; queue++) {
4016 struct mvpp2_tx_queue *txq = port->txqs[queue];
4019 qmap |= (1 << queue);
4026 /* Disable transmit via physical egress queue
4073 /* Update Rx queue status with the number of occupied and available
4099 /* Set rx queue offset */
4300 int queue;
4302 for (queue = 0; queue < txq_number; queue++) {
4303 int id = port->txqs[queue]->id;
4389 int queue;
4392 for (queue = 0; queue < txq_number; queue++) {
4393 struct mvpp2_tx_queue *txq = port->txqs[queue];
4402 /* Free Tx queue skbuffs */
4428 int queue = fls(cause) - 1;
4430 return port->rxqs[queue];
4436 int queue = fls(cause >> 16) - 1;
4438 return port->txqs[queue];
4463 /* Rx/Tx queue initialization/cleanup methods */
4488 /* Set Tx descriptors queue starting address */
4497 /* Create a specified Rx queue */
4519 /* Set Rx descriptors queue starting address - indirect access */
4558 /* Cleanup Rx queue */
4575 /* Clear Rx descriptors queue starting address and size;
4584 /* Create and initialize a Tx queue */
4607 /* Set Tx descriptors queue starting address - indirect access */
4693 /* Set Tx descriptors queue starting address and size */
4711 /* The napi queue has been stopped so wait for all packets
4718 "port %d: cleaning queue %d timed out\n",
4737 /* Reset queue */
4748 int queue;
4757 for (queue = 0; queue < txq_number; queue++) {
4758 txq = port->txqs[queue];
4772 int queue;
4774 for (queue = 0; queue < rxq_number; queue++)
4775 mvpp2_rxq_deinit(port, port->rxqs[queue]);
4781 int queue, err;
4783 for (queue = 0; queue < rxq_number; queue++) {
4784 err = mvpp2_rxq_init(port, port->rxqs[queue]);
4799 int queue, err;
4801 for (queue = 0; queue < txq_number; queue++) {
4802 txq = port->txqs[queue];
5099 /* Update Rx queue management counters */
5278 * Bits 0-15: each bit indicates received packets on the Rx queue
5279 * (bit 0 is for Rx queue 0).
5281 * Bits 16-23: each bit indicates transmitted packets on the Tx queue
5282 * (bit 16 is for Tx queue 0).
5336 /* Clear the bit associated to this Rx queue
5338 * the next Rx queue.
5770 int queue;
5772 for (queue = 0; queue < rxq_number; queue++) {
5773 struct mvpp2_rx_queue *rxq = port->rxqs[queue];
5781 for (queue = 0; queue < txq_number; queue++) {
5782 struct mvpp2_tx_queue *txq = port->txqs[queue];
5925 int queue, cpu, err;
5942 for (queue = 0; queue < txq_number; queue++) {
5943 int queue_phy_id = mvpp2_txq_phys(port->id, queue);
5957 txq->log_id = queue;
5964 port->txqs[queue] = txq;
5974 /* Allocate and initialize Rx queue for this port */
5975 for (queue = 0; queue < rxq_number; queue++) {
5978 /* Map physical Rx queue to port's logical Rx queue */
5982 /* Map this Rx queue to a physical queue */
5983 rxq->id = port->first_rxq + queue;
5985 rxq->logic_rxq = queue;
5987 port->rxqs[queue] = rxq;
5990 /* Configure Rx queue group interrupt for this port */
5994 for (queue = 0; queue < rxq_number; queue++) {
5995 struct mvpp2_rx_queue *rxq = port->rxqs[queue];
6022 for (queue = 0; queue < txq_number; queue++) {
6023 if (!port->txqs[queue])
6025 free_percpu(port->txqs[queue]->pcpu);
6151 /* Increment the first Rx queue number to be used by the next port */
6241 dev_err(&pdev->dev, "invalid queue size parameter\n");
6274 /* Reset Rx queue group interrupt configuration */