Cross Reference: /drivers/net/ethernet/tehuti/tehuti.c

Lines Matching refs:rptr
171 	f->rptr = 0;
1227 	size = f->m.wptr - f->m.rptr;
1233 		rxdd = (struct rxd_desc *)(f->m.va + f->m.rptr);
1248 		f->m.rptr += tmp_len;
1250 		tmp_len = f->m.rptr - f->m.memsz;
1252 			f->m.rptr = tmp_len;
1254 				DBG("wrapped desc rptr=%d tmp_len=%d\n",
1255 				    f->m.rptr, tmp_len);
1309 	WRITE_REG(priv, f->m.reg_RPTR, f->m.rptr & TXF_WPTR_WR_PTR);
1384 	int taken = db->wptr - db->rptr;
1400 	BDX_ASSERT(*pptr != db->rptr &&	/* expect either read */
1417 	BDX_ASSERT(db->rptr == db->wptr);	/* can't read from empty db */
1418 	__bdx_tx_db_ptr_next(db, &db->rptr);
1428 	BDX_ASSERT(db->rptr == db->wptr);	/* we can not get empty db as
1450 	 * avoid rptr == wptr which means db is empty
1456 	d->rptr = d->start;
1597 	f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR;
1598 	fsize = f->m.rptr - f->m.wptr;
1740 	BDX_ASSERT(f->m.rptr >= f->m.memsz);	/* started with valid rptr */
1742 	while (f->m.wptr != f->m.rptr) {
1743 		f->m.rptr += BDX_TXF_DESC_SZ;
1744 		f->m.rptr &= f->m.size_mask;
1748 		BDX_ASSERT(db->rptr->len == 0);
1750 			BDX_ASSERT(db->rptr->addr.dma == 0);
1751 			pci_unmap_page(priv->pdev, db->rptr->addr.dma,
1752 				       db->rptr->len, PCI_DMA_TODEVICE);
1754 		} while (db->rptr->len > 0);
1755 		tx_level -= db->rptr->len;	/* '-' koz len is negative */
1758 		dev_kfree_skb_irq(db->rptr->addr.skb);
1764 	WRITE_REG(priv, f->m.reg_RPTR, f->m.rptr & TXF_WPTR_WR_PTR);
1798 	while (db->rptr != db->wptr) {
1799 		if (likely(db->rptr->len))
1800 			pci_unmap_page(priv->pdev, db->rptr->addr.dma,
1801 				       db->rptr->len, PCI_DMA_TODEVICE);
1803 			dev_kfree_skb(db->rptr->addr.skb);
1864 		/* we substruct 8 because when fifo is full rptr == wptr