Lines Matching refs:REG_WRITE

141 	REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
150 REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);
156 REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);
581 REG_WRITE(ah, AR_PHY_GEN_CTRL, phymode);
587 REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);
589 REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
605 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
615 REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
616 REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
621 REG_WRITE(ah, AR_SELFGEN_MASK, tx);
649 REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
652 REG_WRITE(ah, AR_GLB_SWREG_DISCONT_MODE,
670 REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
671 REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
672 REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae);
674 REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1);
675 REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400);
676 REG_WRITE(ah, AR_SLP32_INC, 0x0001e800);
704 REG_WRITE(ah, reg, val);
906 REG_WRITE(ah, AR_PHY_MODE, rfMode);
911 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
963 REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
978 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
1384 REG_WRITE(ah, AR_PHY_RADAR_0, radar_0);
1385 REG_WRITE(ah, AR_PHY_RADAR_1, radar_1);
1465 REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
1499 REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
1511 REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
1522 REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);
1538 REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
1573 REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
1713 REG_WRITE(ah, AR_CR, AR_CR_RXD);
1714 REG_WRITE(ah, AR_DLCL_IFS(qnum), 0);
1715 REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 20); /* 50 OK */
1716 REG_WRITE(ah, AR_D_GBL_IFS_EIFS, 20);
1717 REG_WRITE(ah, AR_TIME_OUT, 0x00000400);
1718 REG_WRITE(ah, AR_DRETRY_LIMIT(qnum), 0xffffffff);
1741 REG_WRITE(ah, 0xa458, 0);
1743 REG_WRITE(ah, 0xa3c0,
1748 REG_WRITE(ah, 0xa3c4,
1753 REG_WRITE(ah, 0xa3c8,
1757 REG_WRITE(ah, 0xa3cc,
1762 REG_WRITE(ah, 0xa3d0,
1767 REG_WRITE(ah, 0xa3d4,
1772 REG_WRITE(ah, 0xa3e4,
1777 REG_WRITE(ah, 0xa3e8,
1782 REG_WRITE(ah, 0xa3d8,
1787 REG_WRITE(ah, 0xa3dc,
1792 REG_WRITE(ah, 0xa3ec,
1886 REG_WRITE(ah, AR_PHY_RADAR_0, val);
1891 REG_WRITE(ah, AR_PHY_RADAR_0, val);
1922 REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2,
1928 REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1,
1939 REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2,
1964 REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1,
1985 REG_WRITE(ah, AR_PHY_WATCHDOG_STATUS,
2044 REG_WRITE(ah, AR_PHY_RESTART, val);