Lines Matching defs:common

40 	struct ath_common *common = ath9k_hw_common(ah);
65 common->clockrate = clockrate;
70 struct ath_common *common = ath9k_hw_common(ah);
72 return usecs * common->clockrate;
299 struct ath_common *common = ath9k_hw_common(ah);
323 ath_err(common,
334 ath_err(common,
349 struct ath_common *common = ath9k_hw_common(ah);
395 ath_dbg(common, RESET, "serialize_regmode is %d\n",
436 struct ath_common *common = ath9k_hw_common(ah);
446 common->macaddr[2 * i] = eeval >> 8;
447 common->macaddr[2 * i + 1] = eeval & 0xff;
457 struct ath_common *common = ath9k_hw_common(ah);
460 if (common->bus_ops->ath_bus_type != ATH_USB) {
508 struct ath_common *common = ath9k_hw_common(ah);
532 ath_err(common,
550 ath_err(common, "Couldn't reset chip\n");
567 ath_err(common, "Couldn't wakeup chip\n");
592 ath_err(common, "Failed to initialize MAC address\n");
598 common->state = ATH_HW_INITIALIZED;
606 struct ath_common *common = ath9k_hw_common(ah);
632 if (common->bus_ops->ath_bus_type == ATH_USB)
634 ath_err(common, "Hardware device ID 0x%04x not supported\n",
641 ath_err(common,
676 struct ath_common *common = ath9k_hw_common(ah);
688 ath_err(common, "PLL4 meaurement not done\n");
964 struct ath_common *common = ath9k_hw_common(ah);
1018 common->clockrate;
1062 (common->clockrate - 1) |
1072 struct ath_common *common = ath9k_hw_common(ah);
1074 if (common->state < ATH_HW_INITIALIZED)
1103 struct ath_common *common = ath9k_hw_common(ah);
1145 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
1441 struct ath_common *common = ath9k_hw_common(ah);
1456 ath_dbg(common, QUEUE,
1463 ath_err(common, "Could not kill baseband RX\n");
1475 ath_err(common, "Failed to do fast channel change\n");
1484 ath_err(common, "Failed to set channel\n");
1524 struct ath_common *common = ath9k_hw_common(ah);
1529 ath_dbg(common, BSTUCK, "Abnormal NAV: 0x%x\n", val);
1595 struct ath_common *common = ath9k_hw_common(ah);
1603 ath_hw_setbssidmask(common);
1635 struct ath_common *common = ath9k_hw_common(ah);
1641 ath_dbg(common, RESET, "CFG Byte Swap Set 0x%x\n",
1646 ath_dbg(common, RESET, "Setting CFG 0x%x\n",
1650 if (common->bus_ops->ath_bus_type == ATH_USB) {
1673 struct ath_common *common = ath9k_hw_common(ah);
1677 if (AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI)
1713 ath_dbg(common, RESET, "FastChannelChange for %d -> %d\n",
1754 struct ath_common *common = ath9k_hw_common(ah);
1823 ath_err(common, "Chip reset failed\n");
1954 if (AR_SREV_9565(ah) && common->bt_ant_diversity)
2110 struct ath_common *common = ath9k_hw_common(ah);
2122 ath_dbg(common, RESET, "%s -> %s\n",
2140 ath_err(common, "Unknown power mode %u\n", mode);
2204 struct ath_common *common = ath9k_hw_common(ah);
2231 ath_dbg(common, BEACON, "next DTIM %d\n", bs->bs_nextdtim);
2232 ath_dbg(common, BEACON, "next beacon %d\n", nextTbtt);
2233 ath_dbg(common, BEACON, "beacon period %d\n", beaconintval);
2234 ath_dbg(common, BEACON, "DTIM period %d\n", dtimperiod);
2311 struct ath_common *common = ath9k_hw_common(ah);
2327 ath_dbg(common, REGULATORY, "regdomain mapped to 0x%x\n",
2333 ath_err(common,
2385 common->crypt_caps |= ATH_CRYPT_CAP_CIPHER_AESCCM;
2464 ath_info(common, "Enable LNA combining\n");
2478 ath_info(common, "Enable LNA combining\n");
2783 struct ath_common *common = ath9k_hw_common(ah);
2785 REG_WRITE(ah, AR_BSS_ID0, get_unaligned_le32(common->curbssid));
2786 REG_WRITE(ah, AR_BSS_ID1, get_unaligned_le16(common->curbssid + 4) |
2787 ((common->curaid & 0x3fff) << AR_BSS_ID1_AID_S));