Lines Matching refs:hba
145 struct pci_hba_data hba; /* 'C' inheritance - must be first */
179 void __iomem *base_addr = d->hba.base_addr;
214 void __iomem *base_addr = d->hba.base_addr;
307 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
324 __raw_readl(dino_dev->hba.base_addr+DINO_IPR);
328 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
339 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);
370 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK;
392 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;
397 dino_dev->hba.base_addr, mask);
466 res = &dino_dev->hba.lmmio_space;
474 res->name = dino_dev->hba.lmmio_space.name;
477 if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB,
492 bus->resource[0] = &(dino_dev->hba.io_space);
558 if (is_card_dino(&dino_dev->hba.dev->id)) {
559 dino_card_setup(bus, dino_dev->hba.base_addr);
595 if (is_card_dino(&dino_dev->hba.dev->id))
658 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS);
661 dino_dev->hba.base_addr+DINO_IO_COMMAND);
665 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK);
666 __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN);
667 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR);
677 __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT);
684 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN);
686 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE);
687 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR);
688 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR);
690 __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM);
691 __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL);
692 __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM);
695 __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR);
696 __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR);
697 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR);
704 __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD);
725 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN);
731 res = &dino_dev->hba.lmmio_space;
764 res = &dino_dev->hba.lmmio_space;
770 result = ccio_request_resource(dino_dev->hba.dev, &res[i]);
788 pcibios_register_hba(&dino_dev->hba);
832 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);
838 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0);
841 res = &dino_dev->hba.io_space;
847 res->start = HBA_PORT_BASE(dino_dev->hba.hba_num);
854 dino_dev->hba.base_addr);
952 dino_dev->hba.dev = dev;
953 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096);
954 dino_dev->hba.lmmio_space_offset = 0; /* CPU addrs == bus addrs */
956 dino_dev->hba.iommu = ccio_get_iommu(dev);
969 pci_add_resource_offset(&resources, &dino_dev->hba.io_space,
970 HBA_PORT_BASE(dino_dev->hba.hba_num));
971 if (dino_dev->hba.lmmio_space.flags)
972 pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,
973 dino_dev->hba.lmmio_space_offset);
974 if (dino_dev->hba.elmmio_space.flags)
975 pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,
976 dino_dev->hba.lmmio_space_offset);
977 if (dino_dev->hba.gmmio_space.flags)
978 pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
980 dino_dev->hba.bus_num.start = dino_current_bus;
981 dino_dev->hba.bus_num.end = 255;
982 dino_dev->hba.bus_num.flags = IORESOURCE_BUS;
983 pci_add_resource(&resources, &dino_dev->hba.bus_num);
988 dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev,