Lines Matching refs:reg

121 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
128 WRT_REG_WORD(&reg->mailbox0, MBC_LOAD_DUMP_MPI_RAM);
137 WRT_REG_WORD(&reg->mailbox1, LSW(addr));
138 WRT_REG_WORD(&reg->mailbox8, MSW(addr));
140 WRT_REG_WORD(&reg->mailbox2, MSW(dump_dma));
141 WRT_REG_WORD(&reg->mailbox3, LSW(dump_dma));
142 WRT_REG_WORD(&reg->mailbox6, MSW(MSD(dump_dma)));
143 WRT_REG_WORD(&reg->mailbox7, LSW(MSD(dump_dma)));
145 WRT_REG_WORD(&reg->mailbox4, MSW(dwords));
146 WRT_REG_WORD(&reg->mailbox5, LSW(dwords));
148 WRT_REG_WORD(&reg->mailbox9, 0);
149 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
154 stat = RD_REG_DWORD(&reg->host_status);
163 mb0 = RD_REG_WORD(&reg->mailbox0);
164 mb1 = RD_REG_WORD(&reg->mailbox1);
166 WRT_REG_DWORD(&reg->hccr,
168 RD_REG_DWORD(&reg->hccr);
173 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
174 RD_REG_DWORD(&reg->hccr);
201 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
208 WRT_REG_WORD(&reg->mailbox0, MBC_DUMP_RISC_RAM_EXTENDED);
217 WRT_REG_WORD(&reg->mailbox1, LSW(addr));
218 WRT_REG_WORD(&reg->mailbox8, MSW(addr));
220 WRT_REG_WORD(&reg->mailbox2, MSW(dump_dma));
221 WRT_REG_WORD(&reg->mailbox3, LSW(dump_dma));
222 WRT_REG_WORD(&reg->mailbox6, MSW(MSD(dump_dma)));
223 WRT_REG_WORD(&reg->mailbox7, LSW(MSD(dump_dma)));
225 WRT_REG_WORD(&reg->mailbox4, MSW(dwords));
226 WRT_REG_WORD(&reg->mailbox5, LSW(dwords));
227 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
232 stat = RD_REG_DWORD(&reg->host_status);
241 mb0 = RD_REG_WORD(&reg->mailbox0);
243 WRT_REG_DWORD(&reg->hccr,
245 RD_REG_DWORD(&reg->hccr);
250 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
251 RD_REG_DWORD(&reg->hccr);
294 qla24xx_read_window(struct device_reg_24xx __iomem *reg, uint32_t iobase,
299 WRT_REG_DWORD(&reg->iobase_addr, iobase);
300 dmp_reg = &reg->iobase_window;
308 qla24xx_pause_risc(struct device_reg_24xx __iomem *reg, struct qla_hw_data *ha)
310 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_PAUSE);
314 if (RD_REG_DWORD(&reg->host_status) & HSRX_RISC_PAUSED)
324 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
331 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
333 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
338 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
341 WRT_REG_DWORD(&reg->ctrl_status,
349 if ((RD_REG_DWORD(&reg->ctrl_status) &
355 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
358 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
359 RD_REG_DWORD(&reg->hccr); /* PCI Posting. */
361 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
381 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
388 WRT_MAILBOX_REG(ha, reg, 0, MBC_DUMP_RISC_RAM_EXTENDED);
397 WRT_MAILBOX_REG(ha, reg, 1, LSW(addr));
398 WRT_MAILBOX_REG(ha, reg, 8, MSW(addr));
400 WRT_MAILBOX_REG(ha, reg, 2, MSW(dump_dma));
401 WRT_MAILBOX_REG(ha, reg, 3, LSW(dump_dma));
402 WRT_MAILBOX_REG(ha, reg, 6, MSW(MSD(dump_dma)));
403 WRT_MAILBOX_REG(ha, reg, 7, LSW(MSD(dump_dma)));
405 WRT_MAILBOX_REG(ha, reg, 4, words);
406 WRT_REG_WORD(&reg->hccr, HCCR_SET_HOST_INT);
410 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
418 mb0 = RD_MAILBOX_REG(ha, reg, 0);
421 WRT_REG_WORD(&reg->semaphore, 0);
422 WRT_REG_WORD(&reg->hccr,
424 RD_REG_WORD(&reg->hccr);
430 mb0 = RD_MAILBOX_REG(ha, reg, 0);
432 WRT_REG_WORD(&reg->hccr,
434 RD_REG_WORD(&reg->hccr);
439 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
440 RD_REG_WORD(&reg->hccr);
459 qla2xxx_read_window(struct device_reg_2xxx __iomem *reg, uint32_t count,
462 uint16_t __iomem *dmp_reg = &reg->u.isp2300.fb_cmd;
630 device_reg_t __iomem *reg;
644 reg = ISP_QUE_REG(ha, cnt);
647 htonl(RD_REG_DWORD(&reg->isp25mq.req_q_in));
649 htonl(RD_REG_DWORD(&reg->isp25mq.req_q_out));
651 htonl(RD_REG_DWORD(&reg->isp25mq.rsp_q_in));
653 htonl(RD_REG_DWORD(&reg->isp25mq.rsp_q_out));
689 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
718 fw->hccr = htons(RD_REG_WORD(&reg->hccr));
721 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
724 (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
732 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
737 dmp_reg = &reg->flash_address;
741 dmp_reg = &reg->u.isp2300.req_q_in;
745 dmp_reg = &reg->u.isp2300.mailbox0;
749 WRT_REG_WORD(&reg->ctrl_status, 0x40);
750 qla2xxx_read_window(reg, 32, fw->resp_dma_reg);
752 WRT_REG_WORD(&reg->ctrl_status, 0x50);
753 qla2xxx_read_window(reg, 48, fw->dma_reg);
755 WRT_REG_WORD(&reg->ctrl_status, 0x00);
756 dmp_reg = &reg->risc_hw;
760 WRT_REG_WORD(&reg->pcr, 0x2000);
761 qla2xxx_read_window(reg, 16, fw->risc_gp0_reg);
763 WRT_REG_WORD(&reg->pcr, 0x2200);
764 qla2xxx_read_window(reg, 16, fw->risc_gp1_reg);
766 WRT_REG_WORD(&reg->pcr, 0x2400);
767 qla2xxx_read_window(reg, 16, fw->risc_gp2_reg);
769 WRT_REG_WORD(&reg->pcr, 0x2600);
770 qla2xxx_read_window(reg, 16, fw->risc_gp3_reg);
772 WRT_REG_WORD(&reg->pcr, 0x2800);
773 qla2xxx_read_window(reg, 16, fw->risc_gp4_reg);
775 WRT_REG_WORD(&reg->pcr, 0x2A00);
776 qla2xxx_read_window(reg, 16, fw->risc_gp5_reg);
778 WRT_REG_WORD(&reg->pcr, 0x2C00);
779 qla2xxx_read_window(reg, 16, fw->risc_gp6_reg);
781 WRT_REG_WORD(&reg->pcr, 0x2E00);
782 qla2xxx_read_window(reg, 16, fw->risc_gp7_reg);
784 WRT_REG_WORD(&reg->ctrl_status, 0x10);
785 qla2xxx_read_window(reg, 64, fw->frame_buf_hdw_reg);
787 WRT_REG_WORD(&reg->ctrl_status, 0x20);
788 qla2xxx_read_window(reg, 64, fw->fpm_b0_reg);
790 WRT_REG_WORD(&reg->ctrl_status, 0x30);
791 qla2xxx_read_window(reg, 64, fw->fpm_b1_reg);
794 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
796 if ((RD_REG_WORD(&reg->ctrl_status) &
805 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 &&
852 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
882 fw->hccr = htons(RD_REG_WORD(&reg->hccr));
885 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
886 for (cnt = 30000; (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
894 dmp_reg = &reg->flash_address;
898 dmp_reg = &reg->u.isp2100.mailbox0;
901 dmp_reg = &reg->u_end.isp2200.mailbox8;
906 dmp_reg = &reg->u.isp2100.unused_2[0];
910 WRT_REG_WORD(&reg->ctrl_status, 0x00);
911 dmp_reg = &reg->risc_hw;
915 WRT_REG_WORD(&reg->pcr, 0x2000);
916 qla2xxx_read_window(reg, 16, fw->risc_gp0_reg);
918 WRT_REG_WORD(&reg->pcr, 0x2100);
919 qla2xxx_read_window(reg, 16, fw->risc_gp1_reg);
921 WRT_REG_WORD(&reg->pcr, 0x2200);
922 qla2xxx_read_window(reg, 16, fw->risc_gp2_reg);
924 WRT_REG_WORD(&reg->pcr, 0x2300);
925 qla2xxx_read_window(reg, 16, fw->risc_gp3_reg);
927 WRT_REG_WORD(&reg->pcr, 0x2400);
928 qla2xxx_read_window(reg, 16, fw->risc_gp4_reg);
930 WRT_REG_WORD(&reg->pcr, 0x2500);
931 qla2xxx_read_window(reg, 16, fw->risc_gp5_reg);
933 WRT_REG_WORD(&reg->pcr, 0x2600);
934 qla2xxx_read_window(reg, 16, fw->risc_gp6_reg);
936 WRT_REG_WORD(&reg->pcr, 0x2700);
937 qla2xxx_read_window(reg, 16, fw->risc_gp7_reg);
939 WRT_REG_WORD(&reg->ctrl_status, 0x10);
940 qla2xxx_read_window(reg, 16, fw->frame_buf_hdw_reg);
942 WRT_REG_WORD(&reg->ctrl_status, 0x20);
943 qla2xxx_read_window(reg, 64, fw->fpm_b0_reg);
945 WRT_REG_WORD(&reg->ctrl_status, 0x30);
946 qla2xxx_read_window(reg, 64, fw->fpm_b1_reg);
949 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
952 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 &&
962 (RD_REG_WORD(&reg->mctr) & (BIT_1 | BIT_0)) != 0))) {
964 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
966 (RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0 &&
976 WRT_REG_WORD(&reg->mctr, 0xf1);
978 WRT_REG_WORD(&reg->mctr, 0xf2);
979 RD_REG_WORD(&reg->mctr); /* PCI Posting. */
982 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
989 WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_WORD);
994 WRT_MAILBOX_REG(ha, reg, 1, risc_address);
995 WRT_REG_WORD(&reg->hccr, HCCR_SET_HOST_INT);
999 if (RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) {
1000 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
1004 mb0 = RD_MAILBOX_REG(ha, reg, 0);
1005 mb2 = RD_MAILBOX_REG(ha, reg, 2);
1007 WRT_REG_WORD(&reg->semaphore, 0);
1008 WRT_REG_WORD(&reg->hccr,
1010 RD_REG_WORD(&reg->hccr);
1013 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
1014 RD_REG_WORD(&reg->hccr);
1044 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1082 fw->host_status = htonl(RD_REG_DWORD(&reg->host_status));
1088 qla24xx_pause_risc(reg, ha);
1091 dmp_reg = &reg->flash_addr;
1096 WRT_REG_DWORD(&reg->ictrl, 0);
1097 RD_REG_DWORD(&reg->ictrl);
1100 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1101 RD_REG_DWORD(&reg->iobase_addr);
1102 WRT_REG_DWORD(&reg->iobase_select, 0xB0000000);
1103 fw->shadow_reg[0] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1105 WRT_REG_DWORD(&reg->iobase_select, 0xB0100000);
1106 fw->shadow_reg[1] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1108 WRT_REG_DWORD(&reg->iobase_select, 0xB0200000);
1109 fw->shadow_reg[2] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1111 WRT_REG_DWORD(&reg->iobase_select, 0xB0300000);
1112 fw->shadow_reg[3] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1114 WRT_REG_DWORD(&reg->iobase_select, 0xB0400000);
1115 fw->shadow_reg[4] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1117 WRT_REG_DWORD(&reg->iobase_select, 0xB0500000);
1118 fw->shadow_reg[5] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1120 WRT_REG_DWORD(&reg->iobase_select, 0xB0600000);
1121 fw->shadow_reg[6] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1124 mbx_reg = &reg->mailbox0;
1130 iter_reg = qla24xx_read_window(reg, 0xBF00, 16, iter_reg);
1131 iter_reg = qla24xx_read_window(reg, 0xBF10, 16, iter_reg);
1132 iter_reg = qla24xx_read_window(reg, 0xBF20, 16, iter_reg);
1133 iter_reg = qla24xx_read_window(reg, 0xBF30, 16, iter_reg);
1134 iter_reg = qla24xx_read_window(reg, 0xBF40, 16, iter_reg);
1135 iter_reg = qla24xx_read_window(reg, 0xBF50, 16, iter_reg);
1136 iter_reg = qla24xx_read_window(reg, 0xBF60, 16, iter_reg);
1137 qla24xx_read_window(reg, 0xBF70, 16, iter_reg);
1139 qla24xx_read_window(reg, 0xBFE0, 16, fw->xseq_0_reg);
1140 qla24xx_read_window(reg, 0xBFF0, 16, fw->xseq_1_reg);
1144 iter_reg = qla24xx_read_window(reg, 0xFF00, 16, iter_reg);
1145 iter_reg = qla24xx_read_window(reg, 0xFF10, 16, iter_reg);
1146 iter_reg = qla24xx_read_window(reg, 0xFF20, 16, iter_reg);
1147 iter_reg = qla24xx_read_window(reg, 0xFF30, 16, iter_reg);
1148 iter_reg = qla24xx_read_window(reg, 0xFF40, 16, iter_reg);
1149 iter_reg = qla24xx_read_window(reg, 0xFF50, 16, iter_reg);
1150 iter_reg = qla24xx_read_window(reg, 0xFF60, 16, iter_reg);
1151 qla24xx_read_window(reg, 0xFF70, 16, iter_reg);
1153 qla24xx_read_window(reg, 0xFFD0, 16, fw->rseq_0_reg);
1154 qla24xx_read_window(reg, 0xFFE0, 16, fw->rseq_1_reg);
1155 qla24xx_read_window(reg, 0xFFF0, 16, fw->rseq_2_reg);
1158 qla24xx_read_window(reg, 0x7100, 16, fw->cmd_dma_reg);
1162 iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
1163 dmp_reg = &reg->iobase_q;
1168 iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
1169 dmp_reg = &reg->iobase_q;
1174 iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
1175 dmp_reg = &reg->iobase_q;
1181 iter_reg = qla24xx_read_window(reg, 0x7600, 16, iter_reg);
1182 qla24xx_read_window(reg, 0x7610, 16, iter_reg);
1185 iter_reg = qla24xx_read_window(reg, 0x7620, 16, iter_reg);
1186 qla24xx_read_window(reg, 0x7630, 16, iter_reg);
1189 iter_reg = qla24xx_read_window(reg, 0x7640, 16, iter_reg);
1190 qla24xx_read_window(reg, 0x7650, 16, iter_reg);
1193 iter_reg = qla24xx_read_window(reg, 0x7660, 16, iter_reg);
1194 qla24xx_read_window(reg, 0x7670, 16, iter_reg);
1197 iter_reg = qla24xx_read_window(reg, 0x7680, 16, iter_reg);
1198 qla24xx_read_window(reg, 0x7690, 16, iter_reg);
1200 qla24xx_read_window(reg, 0x76A0, 16, fw->xmt_data_dma_reg);
1204 iter_reg = qla24xx_read_window(reg, 0x7700, 16, iter_reg);
1205 qla24xx_read_window(reg, 0x7710, 16, iter_reg);
1208 iter_reg = qla24xx_read_window(reg, 0x7720, 16, iter_reg);
1209 qla24xx_read_window(reg, 0x7730, 16, iter_reg);
1213 iter_reg = qla24xx_read_window(reg, 0x0F00, 16, iter_reg);
1214 iter_reg = qla24xx_read_window(reg, 0x0F10, 16, iter_reg);
1215 iter_reg = qla24xx_read_window(reg, 0x0F20, 16, iter_reg);
1216 iter_reg = qla24xx_read_window(reg, 0x0F30, 16, iter_reg);
1217 iter_reg = qla24xx_read_window(reg, 0x0F40, 16, iter_reg);
1218 iter_reg = qla24xx_read_window(reg, 0x0F50, 16, iter_reg);
1219 iter_reg = qla24xx_read_window(reg, 0x0F60, 16, iter_reg);
1220 qla24xx_read_window(reg, 0x0F70, 16, iter_reg);
1224 iter_reg = qla24xx_read_window(reg, 0x3000, 16, iter_reg);
1225 iter_reg = qla24xx_read_window(reg, 0x3010, 16, iter_reg);
1226 iter_reg = qla24xx_read_window(reg, 0x3020, 16, iter_reg);
1227 iter_reg = qla24xx_read_window(reg, 0x3030, 16, iter_reg);
1228 iter_reg = qla24xx_read_window(reg, 0x3040, 16, iter_reg);
1229 iter_reg = qla24xx_read_window(reg, 0x3050, 16, iter_reg);
1230 qla24xx_read_window(reg, 0x3060, 16, iter_reg);
1234 iter_reg = qla24xx_read_window(reg, 0x4000, 16, iter_reg);
1235 iter_reg = qla24xx_read_window(reg, 0x4010, 16, iter_reg);
1236 iter_reg = qla24xx_read_window(reg, 0x4020, 16, iter_reg);
1237 iter_reg = qla24xx_read_window(reg, 0x4030, 16, iter_reg);
1238 iter_reg = qla24xx_read_window(reg, 0x4040, 16, iter_reg);
1239 iter_reg = qla24xx_read_window(reg, 0x4050, 16, iter_reg);
1240 iter_reg = qla24xx_read_window(reg, 0x4060, 16, iter_reg);
1241 iter_reg = qla24xx_read_window(reg, 0x4070, 16, iter_reg);
1242 iter_reg = qla24xx_read_window(reg, 0x4080, 16, iter_reg);
1243 iter_reg = qla24xx_read_window(reg, 0x4090, 16, iter_reg);
1244 iter_reg = qla24xx_read_window(reg, 0x40A0, 16, iter_reg);
1245 qla24xx_read_window(reg, 0x40B0, 16, iter_reg);
1249 iter_reg = qla24xx_read_window(reg, 0x6000, 16, iter_reg);
1250 iter_reg = qla24xx_read_window(reg, 0x6010, 16, iter_reg);
1251 iter_reg = qla24xx_read_window(reg, 0x6020, 16, iter_reg);
1252 iter_reg = qla24xx_read_window(reg, 0x6030, 16, iter_reg);
1253 iter_reg = qla24xx_read_window(reg, 0x6040, 16, iter_reg);
1254 iter_reg = qla24xx_read_window(reg, 0x6100, 16, iter_reg);
1255 iter_reg = qla24xx_read_window(reg, 0x6130, 16, iter_reg);
1256 iter_reg = qla24xx_read_window(reg, 0x6150, 16, iter_reg);
1257 iter_reg = qla24xx_read_window(reg, 0x6170, 16, iter_reg);
1258 iter_reg = qla24xx_read_window(reg, 0x6190, 16, iter_reg);
1259 qla24xx_read_window(reg, 0x61B0, 16, iter_reg);
1299 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1334 fw->host_status = htonl(RD_REG_DWORD(&reg->host_status));
1340 qla24xx_pause_risc(reg, ha);
1344 iter_reg = qla24xx_read_window(reg, 0x7000, 16, iter_reg);
1345 qla24xx_read_window(reg, 0x7010, 16, iter_reg);
1348 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
1349 RD_REG_DWORD(&reg->iobase_addr);
1350 WRT_REG_DWORD(&reg->iobase_window, 0x01);
1351 dmp_reg = &reg->iobase_c4;
1355 fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
1357 WRT_REG_DWORD(&reg->iobase_window, 0x00);
1358 RD_REG_DWORD(&reg->iobase_window);
1361 dmp_reg = &reg->flash_addr;
1366 WRT_REG_DWORD(&reg->ictrl, 0);
1367 RD_REG_DWORD(&reg->ictrl);
1370 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1371 RD_REG_DWORD(&reg->iobase_addr);
1372 WRT_REG_DWORD(&reg->iobase_select, 0xB0000000);
1373 fw->shadow_reg[0] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1375 WRT_REG_DWORD(&reg->iobase_select, 0xB0100000);
1376 fw->shadow_reg[1] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1378 WRT_REG_DWORD(&reg->iobase_select, 0xB0200000);
1379 fw->shadow_reg[2] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1381 WRT_REG_DWORD(&reg->iobase_select, 0xB0300000);
1382 fw->shadow_reg[3] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1384 WRT_REG_DWORD(&reg->iobase_select, 0xB0400000);
1385 fw->shadow_reg[4] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1387 WRT_REG_DWORD(&reg->iobase_select, 0xB0500000);
1388 fw->shadow_reg[5] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1390 WRT_REG_DWORD(&reg->iobase_select, 0xB0600000);
1391 fw->shadow_reg[6] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1393 WRT_REG_DWORD(&reg->iobase_select, 0xB0700000);
1394 fw->shadow_reg[7] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1396 WRT_REG_DWORD(&reg->iobase_select, 0xB0800000);
1397 fw->shadow_reg[8] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1399 WRT_REG_DWORD(&reg->iobase_select, 0xB0900000);
1400 fw->shadow_reg[9] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1402 WRT_REG_DWORD(&reg->iobase_select, 0xB0A00000);
1403 fw->shadow_reg[10] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1406 WRT_REG_DWORD(&reg->iobase_addr, 0x0010);
1407 fw->risc_io_reg = htonl(RD_REG_DWORD(&reg->iobase_window));
1410 mbx_reg = &reg->mailbox0;
1416 iter_reg = qla24xx_read_window(reg, 0xBF00, 16, iter_reg);
1417 iter_reg = qla24xx_read_window(reg, 0xBF10, 16, iter_reg);
1418 iter_reg = qla24xx_read_window(reg, 0xBF20, 16, iter_reg);
1419 iter_reg = qla24xx_read_window(reg, 0xBF30, 16, iter_reg);
1420 iter_reg = qla24xx_read_window(reg, 0xBF40, 16, iter_reg);
1421 iter_reg = qla24xx_read_window(reg, 0xBF50, 16, iter_reg);
1422 iter_reg = qla24xx_read_window(reg, 0xBF60, 16, iter_reg);
1423 qla24xx_read_window(reg, 0xBF70, 16, iter_reg);
1426 iter_reg = qla24xx_read_window(reg, 0xBFC0, 16, iter_reg);
1427 iter_reg = qla24xx_read_window(reg, 0xBFD0, 16, iter_reg);
1428 qla24xx_read_window(reg, 0xBFE0, 16, iter_reg);
1430 qla24xx_read_window(reg, 0xBFF0, 16, fw->xseq_1_reg);
1434 iter_reg = qla24xx_read_window(reg, 0xFF00, 16, iter_reg);
1435 iter_reg = qla24xx_read_window(reg, 0xFF10, 16, iter_reg);
1436 iter_reg = qla24xx_read_window(reg, 0xFF20, 16, iter_reg);
1437 iter_reg = qla24xx_read_window(reg, 0xFF30, 16, iter_reg);
1438 iter_reg = qla24xx_read_window(reg, 0xFF40, 16, iter_reg);
1439 iter_reg = qla24xx_read_window(reg, 0xFF50, 16, iter_reg);
1440 iter_reg = qla24xx_read_window(reg, 0xFF60, 16, iter_reg);
1441 qla24xx_read_window(reg, 0xFF70, 16, iter_reg);
1444 iter_reg = qla24xx_read_window(reg, 0xFFC0, 16, iter_reg);
1445 qla24xx_read_window(reg, 0xFFD0, 16, iter_reg);
1447 qla24xx_read_window(reg, 0xFFE0, 16, fw->rseq_1_reg);
1448 qla24xx_read_window(reg, 0xFFF0, 16, fw->rseq_2_reg);
1452 iter_reg = qla24xx_read_window(reg, 0xB000, 16, iter_reg);
1453 iter_reg = qla24xx_read_window(reg, 0xB010, 16, iter_reg);
1454 iter_reg = qla24xx_read_window(reg, 0xB020, 16, iter_reg);
1455 iter_reg = qla24xx_read_window(reg, 0xB030, 16, iter_reg);
1456 iter_reg = qla24xx_read_window(reg, 0xB040, 16, iter_reg);
1457 iter_reg = qla24xx_read_window(reg, 0xB050, 16, iter_reg);
1458 iter_reg = qla24xx_read_window(reg, 0xB060, 16, iter_reg);
1459 qla24xx_read_window(reg, 0xB070, 16, iter_reg);
1462 iter_reg = qla24xx_read_window(reg, 0xB0C0, 16, iter_reg);
1463 qla24xx_read_window(reg, 0xB0D0, 16, iter_reg);
1465 qla24xx_read_window(reg, 0xB0E0, 16, fw->aseq_1_reg);
1466 qla24xx_read_window(reg, 0xB0F0, 16, fw->aseq_2_reg);
1469 qla24xx_read_window(reg, 0x7100, 16, fw->cmd_dma_reg);
1473 iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
1474 dmp_reg = &reg->iobase_q;
1479 iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
1480 dmp_reg = &reg->iobase_q;
1485 iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
1486 dmp_reg = &reg->iobase_q;
1492 iter_reg = qla24xx_read_window(reg, 0x7600, 16, iter_reg);
1493 qla24xx_read_window(reg, 0x7610, 16, iter_reg);
1496 iter_reg = qla24xx_read_window(reg, 0x7620, 16, iter_reg);
1497 qla24xx_read_window(reg, 0x7630, 16, iter_reg);
1500 iter_reg = qla24xx_read_window(reg, 0x7640, 16, iter_reg);
1501 qla24xx_read_window(reg, 0x7650, 16, iter_reg);
1504 iter_reg = qla24xx_read_window(reg, 0x7660, 16, iter_reg);
1505 qla24xx_read_window(reg, 0x7670, 16, iter_reg);
1508 iter_reg = qla24xx_read_window(reg, 0x7680, 16, iter_reg);
1509 qla24xx_read_window(reg, 0x7690, 16, iter_reg);
1511 qla24xx_read_window(reg, 0x76A0, 16, fw->xmt_data_dma_reg);
1515 iter_reg = qla24xx_read_window(reg, 0x7700, 16, iter_reg);
1516 qla24xx_read_window(reg, 0x7710, 16, iter_reg);
1519 iter_reg = qla24xx_read_window(reg, 0x7720, 16, iter_reg);
1520 qla24xx_read_window(reg, 0x7730, 16, iter_reg);
1524 iter_reg = qla24xx_read_window(reg, 0x0F00, 16, iter_reg);
1525 iter_reg = qla24xx_read_window(reg, 0x0F10, 16, iter_reg);
1526 iter_reg = qla24xx_read_window(reg, 0x0F20, 16, iter_reg);
1527 iter_reg = qla24xx_read_window(reg, 0x0F30, 16, iter_reg);
1528 iter_reg = qla24xx_read_window(reg, 0x0F40, 16, iter_reg);
1529 iter_reg = qla24xx_read_window(reg, 0x0F50, 16, iter_reg);
1530 iter_reg = qla24xx_read_window(reg, 0x0F60, 16, iter_reg);
1531 qla24xx_read_window(reg, 0x0F70, 16, iter_reg);
1535 iter_reg = qla24xx_read_window(reg, 0x3000, 16, iter_reg);
1536 iter_reg = qla24xx_read_window(reg, 0x3010, 16, iter_reg);
1537 iter_reg = qla24xx_read_window(reg, 0x3020, 16, iter_reg);
1538 iter_reg = qla24xx_read_window(reg, 0x3030, 16, iter_reg);
1539 iter_reg = qla24xx_read_window(reg, 0x3040, 16, iter_reg);
1540 iter_reg = qla24xx_read_window(reg, 0x3050, 16, iter_reg);
1541 iter_reg = qla24xx_read_window(reg, 0x3060, 16, iter_reg);
1542 qla24xx_read_window(reg, 0x3070, 16, iter_reg);
1546 iter_reg = qla24xx_read_window(reg, 0x4000, 16, iter_reg);
1547 iter_reg = qla24xx_read_window(reg, 0x4010, 16, iter_reg);
1548 iter_reg = qla24xx_read_window(reg, 0x4020, 16, iter_reg);
1549 iter_reg = qla24xx_read_window(reg, 0x4030, 16, iter_reg);
1550 iter_reg = qla24xx_read_window(reg, 0x4040, 16, iter_reg);
1551 iter_reg = qla24xx_read_window(reg, 0x4050, 16, iter_reg);
1552 iter_reg = qla24xx_read_window(reg, 0x4060, 16, iter_reg);
1553 iter_reg = qla24xx_read_window(reg, 0x4070, 16, iter_reg);
1554 iter_reg = qla24xx_read_window(reg, 0x4080, 16, iter_reg);
1555 iter_reg = qla24xx_read_window(reg, 0x4090, 16, iter_reg);
1556 iter_reg = qla24xx_read_window(reg, 0x40A0, 16, iter_reg);
1557 qla24xx_read_window(reg, 0x40B0, 16, iter_reg);
1561 iter_reg = qla24xx_read_window(reg, 0x6000, 16, iter_reg);
1562 iter_reg = qla24xx_read_window(reg, 0x6010, 16, iter_reg);
1563 iter_reg = qla24xx_read_window(reg, 0x6020, 16, iter_reg);
1564 iter_reg = qla24xx_read_window(reg, 0x6030, 16, iter_reg);
1565 iter_reg = qla24xx_read_window(reg, 0x6040, 16, iter_reg);
1566 iter_reg = qla24xx_read_window(reg, 0x6100, 16, iter_reg);
1567 iter_reg = qla24xx_read_window(reg, 0x6130, 16, iter_reg);
1568 iter_reg = qla24xx_read_window(reg, 0x6150, 16, iter_reg);
1569 iter_reg = qla24xx_read_window(reg, 0x6170, 16, iter_reg);
1570 iter_reg = qla24xx_read_window(reg, 0x6190, 16, iter_reg);
1571 iter_reg = qla24xx_read_window(reg, 0x61B0, 16, iter_reg);
1572 qla24xx_read_window(reg, 0x6F00, 16, iter_reg);
1618 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1652 fw->host_status = htonl(RD_REG_DWORD(&reg->host_status));
1658 qla24xx_pause_risc(reg, ha);
1662 iter_reg = qla24xx_read_window(reg, 0x7000, 16, iter_reg);
1663 qla24xx_read_window(reg, 0x7010, 16, iter_reg);
1666 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
1667 RD_REG_DWORD(&reg->iobase_addr);
1668 WRT_REG_DWORD(&reg->iobase_window, 0x01);
1669 dmp_reg = &reg->iobase_c4;
1673 fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
1675 WRT_REG_DWORD(&reg->iobase_window, 0x00);
1676 RD_REG_DWORD(&reg->iobase_window);
1679 dmp_reg = &reg->flash_addr;
1684 WRT_REG_DWORD(&reg->ictrl, 0);
1685 RD_REG_DWORD(&reg->ictrl);
1688 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1689 RD_REG_DWORD(&reg->iobase_addr);
1690 WRT_REG_DWORD(&reg->iobase_select, 0xB0000000);
1691 fw->shadow_reg[0] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1693 WRT_REG_DWORD(&reg->iobase_select, 0xB0100000);
1694 fw->shadow_reg[1] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1696 WRT_REG_DWORD(&reg->iobase_select, 0xB0200000);
1697 fw->shadow_reg[2] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1699 WRT_REG_DWORD(&reg->iobase_select, 0xB0300000);
1700 fw->shadow_reg[3] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1702 WRT_REG_DWORD(&reg->iobase_select, 0xB0400000);
1703 fw->shadow_reg[4] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1705 WRT_REG_DWORD(&reg->iobase_select, 0xB0500000);
1706 fw->shadow_reg[5] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1708 WRT_REG_DWORD(&reg->iobase_select, 0xB0600000);
1709 fw->shadow_reg[6] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1711 WRT_REG_DWORD(&reg->iobase_select, 0xB0700000);
1712 fw->shadow_reg[7] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1714 WRT_REG_DWORD(&reg->iobase_select, 0xB0800000);
1715 fw->shadow_reg[8] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1717 WRT_REG_DWORD(&reg->iobase_select, 0xB0900000);
1718 fw->shadow_reg[9] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1720 WRT_REG_DWORD(&reg->iobase_select, 0xB0A00000);
1721 fw->shadow_reg[10] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1724 WRT_REG_DWORD(&reg->iobase_addr, 0x0010);
1725 fw->risc_io_reg = htonl(RD_REG_DWORD(&reg->iobase_window));
1728 mbx_reg = &reg->mailbox0;
1734 iter_reg = qla24xx_read_window(reg, 0xBF00, 16, iter_reg);
1735 iter_reg = qla24xx_read_window(reg, 0xBF10, 16, iter_reg);
1736 iter_reg = qla24xx_read_window(reg, 0xBF20, 16, iter_reg);
1737 iter_reg = qla24xx_read_window(reg, 0xBF30, 16, iter_reg);
1738 iter_reg = qla24xx_read_window(reg, 0xBF40, 16, iter_reg);
1739 iter_reg = qla24xx_read_window(reg, 0xBF50, 16, iter_reg);
1740 iter_reg = qla24xx_read_window(reg, 0xBF60, 16, iter_reg);
1741 qla24xx_read_window(reg, 0xBF70, 16, iter_reg);
1744 iter_reg = qla24xx_read_window(reg, 0xBFC0, 16, iter_reg);
1745 iter_reg = qla24xx_read_window(reg, 0xBFD0, 16, iter_reg);
1746 qla24xx_read_window(reg, 0xBFE0, 16, iter_reg);
1748 qla24xx_read_window(reg, 0xBFF0, 16, fw->xseq_1_reg);
1752 iter_reg = qla24xx_read_window(reg, 0xFF00, 16, iter_reg);
1753 iter_reg = qla24xx_read_window(reg, 0xFF10, 16, iter_reg);
1754 iter_reg = qla24xx_read_window(reg, 0xFF20, 16, iter_reg);
1755 iter_reg = qla24xx_read_window(reg, 0xFF30, 16, iter_reg);
1756 iter_reg = qla24xx_read_window(reg, 0xFF40, 16, iter_reg);
1757 iter_reg = qla24xx_read_window(reg, 0xFF50, 16, iter_reg);
1758 iter_reg = qla24xx_read_window(reg, 0xFF60, 16, iter_reg);
1759 qla24xx_read_window(reg, 0xFF70, 16, iter_reg);
1762 iter_reg = qla24xx_read_window(reg, 0xFFC0, 16, iter_reg);
1763 qla24xx_read_window(reg, 0xFFD0, 16, iter_reg);
1765 qla24xx_read_window(reg, 0xFFE0, 16, fw->rseq_1_reg);
1766 qla24xx_read_window(reg, 0xFFF0, 16, fw->rseq_2_reg);
1770 iter_reg = qla24xx_read_window(reg, 0xB000, 16, iter_reg);
1771 iter_reg = qla24xx_read_window(reg, 0xB010, 16, iter_reg);
1772 iter_reg = qla24xx_read_window(reg, 0xB020, 16, iter_reg);
1773 iter_reg = qla24xx_read_window(reg, 0xB030, 16, iter_reg);
1774 iter_reg = qla24xx_read_window(reg, 0xB040, 16, iter_reg);
1775 iter_reg = qla24xx_read_window(reg, 0xB050, 16, iter_reg);
1776 iter_reg = qla24xx_read_window(reg, 0xB060, 16, iter_reg);
1777 qla24xx_read_window(reg, 0xB070, 16, iter_reg);
1780 iter_reg = qla24xx_read_window(reg, 0xB0C0, 16, iter_reg);
1781 qla24xx_read_window(reg, 0xB0D0, 16, iter_reg);
1783 qla24xx_read_window(reg, 0xB0E0, 16, fw->aseq_1_reg);
1784 qla24xx_read_window(reg, 0xB0F0, 16, fw->aseq_2_reg);
1787 qla24xx_read_window(reg, 0x7100, 16, fw->cmd_dma_reg);
1791 iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
1792 dmp_reg = &reg->iobase_q;
1797 iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
1798 dmp_reg = &reg->iobase_q;
1803 iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
1804 dmp_reg = &reg->iobase_q;
1810 iter_reg = qla24xx_read_window(reg, 0x7600, 16, iter_reg);
1811 qla24xx_read_window(reg, 0x7610, 16, iter_reg);
1814 iter_reg = qla24xx_read_window(reg, 0x7620, 16, iter_reg);
1815 qla24xx_read_window(reg, 0x7630, 16, iter_reg);
1818 iter_reg = qla24xx_read_window(reg, 0x7640, 16, iter_reg);
1819 qla24xx_read_window(reg, 0x7650, 16, iter_reg);
1822 iter_reg = qla24xx_read_window(reg, 0x7660, 16, iter_reg);
1823 qla24xx_read_window(reg, 0x7670, 16, iter_reg);
1826 iter_reg = qla24xx_read_window(reg, 0x7680, 16, iter_reg);
1827 qla24xx_read_window(reg, 0x7690, 16, iter_reg);
1829 qla24xx_read_window(reg, 0x76A0, 16, fw->xmt_data_dma_reg);
1833 iter_reg = qla24xx_read_window(reg, 0x7700, 16, iter_reg);
1834 qla24xx_read_window(reg, 0x7710, 16, iter_reg);
1837 iter_reg = qla24xx_read_window(reg, 0x7720, 16, iter_reg);
1838 qla24xx_read_window(reg, 0x7730, 16, iter_reg);
1842 iter_reg = qla24xx_read_window(reg, 0x0F00, 16, iter_reg);
1843 iter_reg = qla24xx_read_window(reg, 0x0F10, 16, iter_reg);
1844 iter_reg = qla24xx_read_window(reg, 0x0F20, 16, iter_reg);
1845 iter_reg = qla24xx_read_window(reg, 0x0F30, 16, iter_reg);
1846 iter_reg = qla24xx_read_window(reg, 0x0F40, 16, iter_reg);
1847 iter_reg = qla24xx_read_window(reg, 0x0F50, 16, iter_reg);
1848 iter_reg = qla24xx_read_window(reg, 0x0F60, 16, iter_reg);
1849 qla24xx_read_window(reg, 0x0F70, 16, iter_reg);
1853 iter_reg = qla24xx_read_window(reg, 0x3000, 16, iter_reg);
1854 iter_reg = qla24xx_read_window(reg, 0x3010, 16, iter_reg);
1855 iter_reg = qla24xx_read_window(reg, 0x3020, 16, iter_reg);
1856 iter_reg = qla24xx_read_window(reg, 0x3030, 16, iter_reg);
1857 iter_reg = qla24xx_read_window(reg, 0x3040, 16, iter_reg);
1858 iter_reg = qla24xx_read_window(reg, 0x3050, 16, iter_reg);
1859 iter_reg = qla24xx_read_window(reg, 0x3060, 16, iter_reg);
1860 qla24xx_read_window(reg, 0x3070, 16, iter_reg);
1864 iter_reg = qla24xx_read_window(reg, 0x4000, 16, iter_reg);
1865 iter_reg = qla24xx_read_window(reg, 0x4010, 16, iter_reg);
1866 iter_reg = qla24xx_read_window(reg, 0x4020, 16, iter_reg);
1867 iter_reg = qla24xx_read_window(reg, 0x4030, 16, iter_reg);
1868 iter_reg = qla24xx_read_window(reg, 0x4040, 16, iter_reg);
1869 iter_reg = qla24xx_read_window(reg, 0x4050, 16, iter_reg);
1870 iter_reg = qla24xx_read_window(reg, 0x4060, 16, iter_reg);
1871 iter_reg = qla24xx_read_window(reg, 0x4070, 16, iter_reg);
1872 iter_reg = qla24xx_read_window(reg, 0x4080, 16, iter_reg);
1873 iter_reg = qla24xx_read_window(reg, 0x4090, 16, iter_reg);
1874 iter_reg = qla24xx_read_window(reg, 0x40A0, 16, iter_reg);
1875 iter_reg = qla24xx_read_window(reg, 0x40B0, 16, iter_reg);
1876 iter_reg = qla24xx_read_window(reg, 0x40C0, 16, iter_reg);
1877 qla24xx_read_window(reg, 0x40D0, 16, iter_reg);
1881 iter_reg = qla24xx_read_window(reg, 0x6000, 16, iter_reg);
1882 iter_reg = qla24xx_read_window(reg, 0x6010, 16, iter_reg);
1883 iter_reg = qla24xx_read_window(reg, 0x6020, 16, iter_reg);
1884 iter_reg = qla24xx_read_window(reg, 0x6030, 16, iter_reg);
1885 iter_reg = qla24xx_read_window(reg, 0x6040, 16, iter_reg);
1886 iter_reg = qla24xx_read_window(reg, 0x6100, 16, iter_reg);
1887 iter_reg = qla24xx_read_window(reg, 0x6130, 16, iter_reg);
1888 iter_reg = qla24xx_read_window(reg, 0x6150, 16, iter_reg);
1889 iter_reg = qla24xx_read_window(reg, 0x6170, 16, iter_reg);
1890 iter_reg = qla24xx_read_window(reg, 0x6190, 16, iter_reg);
1891 iter_reg = qla24xx_read_window(reg, 0x61B0, 16, iter_reg);
1892 iter_reg = qla24xx_read_window(reg, 0x61C0, 16, iter_reg);
1893 qla24xx_read_window(reg, 0x6F00, 16, iter_reg);
1939 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1972 fw->host_status = htonl(RD_REG_DWORD(&reg->host_status));
1978 qla24xx_pause_risc(reg, ha);
1980 WRT_REG_DWORD(&reg->iobase_addr, 0x6000);
1981 dmp_reg = &reg->iobase_window;
1985 dmp_reg = &reg->unused_4_1[0];
1989 WRT_REG_DWORD(&reg->iobase_addr, 0x6010);
1990 dmp_reg = &reg->unused_4_1[2];
1995 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1996 RD_REG_DWORD(&reg->iobase_addr);
1997 WRT_REG_DWORD(&reg->iobase_select, 0x60000000); /* write to F0h = PCR */
2001 iter_reg = qla24xx_read_window(reg, 0x7000, 16, iter_reg);
2002 iter_reg = qla24xx_read_window(reg, 0x7010, 16, iter_reg);
2003 qla24xx_read_window(reg, 0x7040, 16, iter_reg);
2006 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
2007 RD_REG_DWORD(&reg->iobase_addr);
2008 WRT_REG_DWORD(&reg->iobase_window, 0x01);
2009 dmp_reg = &reg->iobase_c4;
2013 fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
2015 WRT_REG_DWORD(&reg->iobase_window, 0x00);
2016 RD_REG_DWORD(&reg->iobase_window);
2019 dmp_reg = &reg->flash_addr;
2024 WRT_REG_DWORD(&reg->ictrl, 0);
2025 RD_REG_DWORD(&reg->ictrl);
2028 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
2029 RD_REG_DWORD(&reg->iobase_addr);
2030 WRT_REG_DWORD(&reg->iobase_select, 0xB0000000);
2031 fw->shadow_reg[0] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2033 WRT_REG_DWORD(&reg->iobase_select, 0xB0100000);
2034 fw->shadow_reg[1] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2036 WRT_REG_DWORD(&reg->iobase_select, 0xB0200000);
2037 fw->shadow_reg[2] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2039 WRT_REG_DWORD(&reg->iobase_select, 0xB0300000);
2040 fw->shadow_reg[3] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2042 WRT_REG_DWORD(&reg->iobase_select, 0xB0400000);
2043 fw->shadow_reg[4] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2045 WRT_REG_DWORD(&reg->iobase_select, 0xB0500000);
2046 fw->shadow_reg[5] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2048 WRT_REG_DWORD(&reg->iobase_select, 0xB0600000);
2049 fw->shadow_reg[6] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2051 WRT_REG_DWORD(&reg->iobase_select, 0xB0700000);
2052 fw->shadow_reg[7] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2054 WRT_REG_DWORD(&reg->iobase_select, 0xB0800000);
2055 fw->shadow_reg[8] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2057 WRT_REG_DWORD(&reg->iobase_select, 0xB0900000);
2058 fw->shadow_reg[9] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2060 WRT_REG_DWORD(&reg->iobase_select, 0xB0A00000);
2061 fw->shadow_reg[10] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
2064 WRT_REG_DWORD(&reg->iobase_addr, 0x0010);
2065 fw->risc_io_reg = htonl(RD_REG_DWORD(&reg->iobase_window));
2068 mbx_reg = &reg->mailbox0;
2074 iter_reg = qla24xx_read_window(reg, 0xBE00, 16, iter_reg);
2075 iter_reg = qla24xx_read_window(reg, 0xBE10, 16, iter_reg);
2076 iter_reg = qla24xx_read_window(reg, 0xBE20, 16, iter_reg);
2077 iter_reg = qla24xx_read_window(reg, 0xBE30, 16, iter_reg);
2078 iter_reg = qla24xx_read_window(reg, 0xBE40, 16, iter_reg);
2079 iter_reg = qla24xx_read_window(reg, 0xBE50, 16, iter_reg);
2080 iter_reg = qla24xx_read_window(reg, 0xBE60, 16, iter_reg);
2081 iter_reg = qla24xx_read_window(reg, 0xBE70, 16, iter_reg);
2082 iter_reg = qla24xx_read_window(reg, 0xBF00, 16, iter_reg);
2083 iter_reg = qla24xx_read_window(reg, 0xBF10, 16, iter_reg);
2084 iter_reg = qla24xx_read_window(reg, 0xBF20, 16, iter_reg);
2085 iter_reg = qla24xx_read_window(reg, 0xBF30, 16, iter_reg);
2086 iter_reg = qla24xx_read_window(reg, 0xBF40, 16, iter_reg);
2087 iter_reg = qla24xx_read_window(reg, 0xBF50, 16, iter_reg);
2088 iter_reg = qla24xx_read_window(reg, 0xBF60, 16, iter_reg);
2089 qla24xx_read_window(reg, 0xBF70, 16, iter_reg);
2092 iter_reg = qla24xx_read_window(reg, 0xBFC0, 16, iter_reg);
2093 iter_reg = qla24xx_read_window(reg, 0xBFD0, 16, iter_reg);
2094 qla24xx_read_window(reg, 0xBFE0, 16, iter_reg);
2096 qla24xx_read_window(reg, 0xBFF0, 16, fw->xseq_1_reg);
2098 qla24xx_read_window(reg, 0xBEF0, 16, fw->xseq_2_reg);
2102 iter_reg = qla24xx_read_window(reg, 0xFE00, 16, iter_reg);
2103 iter_reg = qla24xx_read_window(reg, 0xFE10, 16, iter_reg);
2104 iter_reg = qla24xx_read_window(reg, 0xFE20, 16, iter_reg);
2105 iter_reg = qla24xx_read_window(reg, 0xFE30, 16, iter_reg);
2106 iter_reg = qla24xx_read_window(reg, 0xFE40, 16, iter_reg);
2107 iter_reg = qla24xx_read_window(reg, 0xFE50, 16, iter_reg);
2108 iter_reg = qla24xx_read_window(reg, 0xFE60, 16, iter_reg);
2109 iter_reg = qla24xx_read_window(reg, 0xFE70, 16, iter_reg);
2110 iter_reg = qla24xx_read_window(reg, 0xFF00, 16, iter_reg);
2111 iter_reg = qla24xx_read_window(reg, 0xFF10, 16, iter_reg);
2112 iter_reg = qla24xx_read_window(reg, 0xFF20, 16, iter_reg);
2113 iter_reg = qla24xx_read_window(reg, 0xFF30, 16, iter_reg);
2114 iter_reg = qla24xx_read_window(reg, 0xFF40, 16, iter_reg);
2115 iter_reg = qla24xx_read_window(reg, 0xFF50, 16, iter_reg);
2116 iter_reg = qla24xx_read_window(reg, 0xFF60, 16, iter_reg);
2117 qla24xx_read_window(reg, 0xFF70, 16, iter_reg);
2120 iter_reg = qla24xx_read_window(reg, 0xFFC0, 16, iter_reg);
2121 qla24xx_read_window(reg, 0xFFD0, 16, iter_reg);
2123 qla24xx_read_window(reg, 0xFFE0, 16, fw->rseq_1_reg);
2124 qla24xx_read_window(reg, 0xFFF0, 16, fw->rseq_2_reg);
2125 qla24xx_read_window(reg, 0xFEF0, 16, fw->rseq_3_reg);
2129 iter_reg = qla24xx_read_window(reg, 0xB000, 16, iter_reg);
2130 iter_reg = qla24xx_read_window(reg, 0xB010, 16, iter_reg);
2131 iter_reg = qla24xx_read_window(reg, 0xB020, 16, iter_reg);
2132 iter_reg = qla24xx_read_window(reg, 0xB030, 16, iter_reg);
2133 iter_reg = qla24xx_read_window(reg, 0xB040, 16, iter_reg);
2134 iter_reg = qla24xx_read_window(reg, 0xB050, 16, iter_reg);
2135 iter_reg = qla24xx_read_window(reg, 0xB060, 16, iter_reg);
2136 iter_reg = qla24xx_read_window(reg, 0xB070, 16, iter_reg);
2137 iter_reg = qla24xx_read_window(reg, 0xB100, 16, iter_reg);
2138 iter_reg = qla24xx_read_window(reg, 0xB110, 16, iter_reg);
2139 iter_reg = qla24xx_read_window(reg, 0xB120, 16, iter_reg);
2140 iter_reg = qla24xx_read_window(reg, 0xB130, 16, iter_reg);
2141 iter_reg = qla24xx_read_window(reg, 0xB140, 16, iter_reg);
2142 iter_reg = qla24xx_read_window(reg, 0xB150, 16, iter_reg);
2143 iter_reg = qla24xx_read_window(reg, 0xB160, 16, iter_reg);
2144 qla24xx_read_window(reg, 0xB170, 16, iter_reg);
2147 iter_reg = qla24xx_read_window(reg, 0xB0C0, 16, iter_reg);
2148 qla24xx_read_window(reg, 0xB0D0, 16, iter_reg);
2150 qla24xx_read_window(reg, 0xB0E0, 16, fw->aseq_1_reg);
2151 qla24xx_read_window(reg, 0xB0F0, 16, fw->aseq_2_reg);
2152 qla24xx_read_window(reg, 0xB1F0, 16, fw->aseq_3_reg);
2156 iter_reg = qla24xx_read_window(reg, 0x7100, 16, iter_reg);
2157 iter_reg = qla24xx_read_window(reg, 0x7120, 16, iter_reg);
2158 iter_reg = qla24xx_read_window(reg, 0x7130, 16, iter_reg);
2159 qla24xx_read_window(reg, 0x71F0, 16, iter_reg);
2163 iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
2164 dmp_reg = &reg->iobase_q;
2169 iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
2170 dmp_reg = &reg->iobase_q;
2175 iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
2176 dmp_reg = &reg->iobase_q;
2182 iter_reg = qla24xx_read_window(reg, 0x7600, 16, iter_reg);
2183 qla24xx_read_window(reg, 0x7610, 16, iter_reg);
2186 iter_reg = qla24xx_read_window(reg, 0x7620, 16, iter_reg);
2187 qla24xx_read_window(reg, 0x7630, 16, iter_reg);
2190 iter_reg = qla24xx_read_window(reg, 0x7640, 16, iter_reg);
2191 qla24xx_read_window(reg, 0x7650, 16, iter_reg);
2194 iter_reg = qla24xx_read_window(reg, 0x7660, 16, iter_reg);
2195 qla24xx_read_window(reg, 0x7670, 16, iter_reg);
2198 iter_reg = qla24xx_read_window(reg, 0x7680, 16, iter_reg);
2199 qla24xx_read_window(reg, 0x7690, 16, iter_reg);
2201 qla24xx_read_window(reg, 0x76A0, 16, fw->xmt_data_dma_reg);
2205 iter_reg = qla24xx_read_window(reg, 0x7700, 16, iter_reg);
2206 qla24xx_read_window(reg, 0x7710, 16, iter_reg);
2209 iter_reg = qla24xx_read_window(reg, 0x7720, 16, iter_reg);
2210 qla24xx_read_window(reg, 0x7730, 16, iter_reg);
2214 iter_reg = qla24xx_read_window(reg, 0x0F00, 16, iter_reg);
2215 iter_reg = qla24xx_read_window(reg, 0x0F10, 16, iter_reg);
2216 iter_reg = qla24xx_read_window(reg, 0x0F20, 16, iter_reg);
2217 iter_reg = qla24xx_read_window(reg, 0x0F30, 16, iter_reg);
2218 iter_reg = qla24xx_read_window(reg, 0x0F40, 16, iter_reg);
2219 iter_reg = qla24xx_read_window(reg, 0x0F50, 16, iter_reg);
2220 iter_reg = qla24xx_read_window(reg, 0x0F60, 16, iter_reg);
2221 qla24xx_read_window(reg, 0x0F70, 16, iter_reg);
2225 iter_reg = qla24xx_read_window(reg, 0x3000, 16, iter_reg);
2226 iter_reg = qla24xx_read_window(reg, 0x3010, 16, iter_reg);
2227 iter_reg = qla24xx_read_window(reg, 0x3020, 16, iter_reg);
2228 iter_reg = qla24xx_read_window(reg, 0x3030, 16, iter_reg);
2229 iter_reg = qla24xx_read_window(reg, 0x3040, 16, iter_reg);
2230 iter_reg = qla24xx_read_window(reg, 0x3050, 16, iter_reg);
2231 iter_reg = qla24xx_read_window(reg, 0x3060, 16, iter_reg);
2232 qla24xx_read_window(reg, 0x3070, 16, iter_reg);
2236 iter_reg = qla24xx_read_window(reg, 0x4000, 16, iter_reg);
2237 iter_reg = qla24xx_read_window(reg, 0x4010, 16, iter_reg);
2238 iter_reg = qla24xx_read_window(reg, 0x4020, 16, iter_reg);
2239 iter_reg = qla24xx_read_window(reg, 0x4030, 16, iter_reg);
2240 iter_reg = qla24xx_read_window(reg, 0x4040, 16, iter_reg);
2241 iter_reg = qla24xx_read_window(reg, 0x4050, 16, iter_reg);
2242 iter_reg = qla24xx_read_window(reg, 0x4060, 16, iter_reg);
2243 iter_reg = qla24xx_read_window(reg, 0x4070, 16, iter_reg);
2244 iter_reg = qla24xx_read_window(reg, 0x4080, 16, iter_reg);
2245 iter_reg = qla24xx_read_window(reg, 0x4090, 16, iter_reg);
2246 iter_reg = qla24xx_read_window(reg, 0x40A0, 16, iter_reg);
2247 iter_reg = qla24xx_read_window(reg, 0x40B0, 16, iter_reg);
2248 iter_reg = qla24xx_read_window(reg, 0x40C0, 16, iter_reg);
2249 iter_reg = qla24xx_read_window(reg, 0x40D0, 16, iter_reg);
2250 iter_reg = qla24xx_read_window(reg, 0x40E0, 16, iter_reg);
2251 qla24xx_read_window(reg, 0x40F0, 16, iter_reg);
2255 iter_reg = qla24xx_read_window(reg, 0x5C00, 16, iter_reg);
2256 iter_reg = qla24xx_read_window(reg, 0x5C10, 16, iter_reg);
2257 iter_reg = qla24xx_read_window(reg, 0x5C20, 16, iter_reg);
2258 iter_reg = qla24xx_read_window(reg, 0x5C30, 16, iter_reg);
2259 iter_reg = qla24xx_read_window(reg, 0x5C40, 16, iter_reg);
2260 iter_reg = qla24xx_read_window(reg, 0x5C50, 16, iter_reg);
2261 iter_reg = qla24xx_read_window(reg, 0x5C60, 16, iter_reg);
2262 iter_reg = qla24xx_read_window(reg, 0x5C70, 16, iter_reg);
2263 iter_reg = qla24xx_read_window(reg, 0x5C80, 16, iter_reg);
2264 iter_reg = qla24xx_read_window(reg, 0x5C90, 16, iter_reg);
2265 iter_reg = qla24xx_read_window(reg, 0x5CA0, 16, iter_reg);
2266 iter_reg = qla24xx_read_window(reg, 0x5CB0, 16, iter_reg);
2267 iter_reg = qla24xx_read_window(reg, 0x5CC0, 16, iter_reg);
2268 iter_reg = qla24xx_read_window(reg, 0x5CD0, 16, iter_reg);
2269 iter_reg = qla24xx_read_window(reg, 0x5CE0, 16, iter_reg);
2270 qla24xx_read_window(reg, 0x5CF0, 16, iter_reg);
2274 iter_reg = qla24xx_read_window(reg, 0x5D00, 16, iter_reg);
2275 iter_reg = qla24xx_read_window(reg, 0x5D10, 16, iter_reg);
2276 iter_reg = qla24xx_read_window(reg, 0x5D20, 16, iter_reg);
2277 iter_reg = qla24xx_read_window(reg, 0x5D30, 16, iter_reg);
2278 iter_reg = qla24xx_read_window(reg, 0x5D40, 16, iter_reg);
2279 iter_reg = qla24xx_read_window(reg, 0x5D50, 16, iter_reg);
2280 iter_reg = qla24xx_read_window(reg, 0x5D60, 16, iter_reg);
2281 iter_reg = qla24xx_read_window(reg, 0x5D70, 16, iter_reg);
2282 iter_reg = qla24xx_read_window(reg, 0x5D80, 16, iter_reg);
2283 iter_reg = qla24xx_read_window(reg, 0x5D90, 16, iter_reg);
2284 iter_reg = qla24xx_read_window(reg, 0x5DA0, 16, iter_reg);
2285 iter_reg = qla24xx_read_window(reg, 0x5DB0, 16, iter_reg);
2286 iter_reg = qla24xx_read_window(reg, 0x5DC0, 16, iter_reg);
2287 iter_reg = qla24xx_read_window(reg, 0x5DD0, 16, iter_reg);
2288 iter_reg = qla24xx_read_window(reg, 0x5DE0, 16, iter_reg);
2289 qla24xx_read_window(reg, 0x5DF0, 16, iter_reg);
2293 iter_reg = qla24xx_read_window(reg, 0x5E00, 16, iter_reg);
2294 iter_reg = qla24xx_read_window(reg, 0x5E10, 16, iter_reg);
2295 iter_reg = qla24xx_read_window(reg, 0x5E20, 16, iter_reg);
2296 iter_reg = qla24xx_read_window(reg, 0x5E30, 16, iter_reg);
2297 iter_reg = qla24xx_read_window(reg, 0x5E40, 16, iter_reg);
2298 iter_reg = qla24xx_read_window(reg, 0x5E50, 16, iter_reg);
2299 iter_reg = qla24xx_read_window(reg, 0x5E60, 16, iter_reg);
2300 iter_reg = qla24xx_read_window(reg, 0x5E70, 16, iter_reg);
2301 iter_reg = qla24xx_read_window(reg, 0x5E80, 16, iter_reg);
2302 iter_reg = qla24xx_read_window(reg, 0x5E90, 16, iter_reg);
2303 iter_reg = qla24xx_read_window(reg, 0x5EA0, 16, iter_reg);
2304 iter_reg = qla24xx_read_window(reg, 0x5EB0, 16, iter_reg);
2305 iter_reg = qla24xx_read_window(reg, 0x5EC0, 16, iter_reg);
2306 iter_reg = qla24xx_read_window(reg, 0x5ED0, 16, iter_reg);
2307 iter_reg = qla24xx_read_window(reg, 0x5EE0, 16, iter_reg);
2308 qla24xx_read_window(reg, 0x5EF0, 16, iter_reg);
2312 iter_reg = qla24xx_read_window(reg, 0x5F00, 16, iter_reg);
2313 iter_reg = qla24xx_read_window(reg, 0x5F10, 16, iter_reg);
2314 iter_reg = qla24xx_read_window(reg, 0x5F20, 16, iter_reg);
2315 iter_reg = qla24xx_read_window(reg, 0x5F30, 16, iter_reg);
2316 iter_reg = qla24xx_read_window(reg, 0x5F40, 16, iter_reg);
2317 iter_reg = qla24xx_read_window(reg, 0x5F50, 16, iter_reg);
2318 iter_reg = qla24xx_read_window(reg, 0x5F60, 16, iter_reg);
2319 iter_reg = qla24xx_read_window(reg, 0x5F70, 16, iter_reg);
2320 iter_reg = qla24xx_read_window(reg, 0x5F80, 16, iter_reg);
2321 iter_reg = qla24xx_read_window(reg, 0x5F90, 16, iter_reg);
2322 iter_reg = qla24xx_read_window(reg, 0x5FA0, 16, iter_reg);
2323 iter_reg = qla24xx_read_window(reg, 0x5FB0, 16, iter_reg);
2324 iter_reg = qla24xx_read_window(reg, 0x5FC0, 16, iter_reg);
2325 iter_reg = qla24xx_read_window(reg, 0x5FD0, 16, iter_reg);
2326 iter_reg = qla24xx_read_window(reg, 0x5FE0, 16, iter_reg);
2327 qla24xx_read_window(reg, 0x5FF0, 16, iter_reg);
2330 iter_reg = qla24xx_read_window(reg, 0x7080, 16, iter_reg);
2331 iter_reg = qla24xx_read_window(reg, 0x7090, 16, iter_reg);
2332 iter_reg = qla24xx_read_window(reg, 0x70A0, 16, iter_reg);
2333 iter_reg = qla24xx_read_window(reg, 0x70B0, 16, iter_reg);
2334 iter_reg = qla24xx_read_window(reg, 0x70C0, 16, iter_reg);
2335 iter_reg = qla24xx_read_window(reg, 0x70D0, 16, iter_reg);
2336 iter_reg = qla24xx_read_window(reg, 0x70E0, 16, iter_reg);
2337 qla24xx_read_window(reg, 0x70F0, 16, iter_reg);
2340 qla24xx_read_window(reg, 0x7800, 16, fw->queue_control_reg);
2344 iter_reg = qla24xx_read_window(reg, 0x6000, 16, iter_reg);
2345 iter_reg = qla24xx_read_window(reg, 0x6010, 16, iter_reg);
2346 iter_reg = qla24xx_read_window(reg, 0x6020, 16, iter_reg);
2347 iter_reg = qla24xx_read_window(reg, 0x6030, 16, iter_reg);
2348 iter_reg = qla24xx_read_window(reg, 0x6040, 16, iter_reg);
2349 iter_reg = qla24xx_read_window(reg, 0x6060, 16, iter_reg);
2350 iter_reg = qla24xx_read_window(reg, 0x6070, 16, iter_reg);
2351 iter_reg = qla24xx_read_window(reg, 0x6100, 16, iter_reg);
2352 iter_reg = qla24xx_read_window(reg, 0x6130, 16, iter_reg);
2353 iter_reg = qla24xx_read_window(reg, 0x6150, 16, iter_reg);
2354 iter_reg = qla24xx_read_window(reg, 0x6170, 16, iter_reg);
2355 iter_reg = qla24xx_read_window(reg, 0x6190, 16, iter_reg);
2356 iter_reg = qla24xx_read_window(reg, 0x61B0, 16, iter_reg);
2357 iter_reg = qla24xx_read_window(reg, 0x61C0, 16, iter_reg);
2358 iter_reg = qla24xx_read_window(reg, 0x6530, 16, iter_reg);
2359 iter_reg = qla24xx_read_window(reg, 0x6540, 16, iter_reg);
2360 iter_reg = qla24xx_read_window(reg, 0x6550, 16, iter_reg);
2361 iter_reg = qla24xx_read_window(reg, 0x6560, 16, iter_reg);
2362 iter_reg = qla24xx_read_window(reg, 0x6570, 16, iter_reg);
2363 iter_reg = qla24xx_read_window(reg, 0x6580, 16, iter_reg);
2364 iter_reg = qla24xx_read_window(reg, 0x6590, 16, iter_reg);
2365 iter_reg = qla24xx_read_window(reg, 0x65A0, 16, iter_reg);
2366 iter_reg = qla24xx_read_window(reg, 0x65B0, 16, iter_reg);
2367 iter_reg = qla24xx_read_window(reg, 0x65C0, 16, iter_reg);
2368 iter_reg = qla24xx_read_window(reg, 0x65D0, 16, iter_reg);
2369 iter_reg = qla24xx_read_window(reg, 0x65E0, 16, iter_reg);
2370 qla24xx_read_window(reg, 0x6F00, 16, iter_reg);
2384 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2385 RD_REG_DWORD(&reg->hccr);
2387 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2388 RD_REG_DWORD(&reg->hccr);
2390 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2391 RD_REG_DWORD(&reg->hccr);
2393 for (cnt = 30000; cnt && (RD_REG_WORD(&reg->mailbox0)); cnt--)
2647 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2660 mbx_reg = MAILBOX_REG(ha, reg, 0);