Lines Matching refs:ret
115 int ret;
117 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_STATUS, 1);
118 if (ret < 0)
119 return ret;
172 int ret;
174 ret = sca3000_reg_lock_on(st);
175 if (ret < 0)
177 if (ret) {
178 ret = __sca3000_unlock_reg_lock(st);
179 if (ret)
184 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, sel);
185 if (ret)
189 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_DATA, val);
192 return ret;
203 int ret;
205 ret = sca3000_reg_lock_on(st);
206 if (ret < 0)
208 if (ret) {
209 ret = __sca3000_unlock_reg_lock(st);
210 if (ret)
214 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, ctrl_reg);
215 if (ret)
217 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_CTRL_DATA, 1);
218 if (ret)
223 return ret;
234 int ret;
239 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_STATUS, 1);
240 if (ret < 0)
249 return ret;
260 int len = 0, ret;
265 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_REVID, 1);
266 if (ret < 0)
275 return ret ? ret : len;
323 int len = 0, ret;
326 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
327 if (ret)
360 return ret ? ret : len;
374 int ret;
379 ret = kstrtou8(buf, 10, &val);
380 if (ret)
383 ret = -EINVAL;
386 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
387 if (ret)
391 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, st->rx[0]);
392 if (ret)
401 return ret;
481 int ret;
493 ret = sca3000_read_data_short(st, address, 2);
494 if (ret < 0) {
496 return ret;
503 ret = sca3000_read_data_short(st,
505 if (ret < 0) {
507 return ret;
544 int len = 0, ret, val;
547 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
550 if (ret)
575 return ret;
586 int ret;
588 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
589 if (ret)
603 return ret;
615 int ret, len = 0, base_freq = 0, val;
618 ret = __sca3000_get_base_freq(st, st->info, &base_freq);
619 if (ret)
621 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
623 if (ret)
625 val = ret;
644 return ret;
657 int ret, base_freq = 0;
661 ret = kstrtoint(buf, 10, &val);
662 if (ret)
663 return ret;
667 ret = __sca3000_get_base_freq(st, st->info, &base_freq);
668 if (ret)
671 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
672 if (ret < 0)
674 ctrlval = ret;
683 ret = -EINVAL;
686 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
691 return ret ? ret : len;
714 int ret, i;
719 ret = sca3000_read_ctrl_reg(st, sca3000_addresses[num][1]);
721 if (ret < 0)
722 return ret;
725 for_each_set_bit(i, (unsigned long *)&ret,
729 for_each_set_bit(i, (unsigned long *)&ret,
748 int ret;
769 ret = sca3000_write_ctrl_reg(st, sca3000_addresses[num][1], nonlinear);
772 return ret;
802 int ret, val;
810 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_STATUS, 1);
813 if (ret)
867 int ret;
873 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
874 if (ret)
878 ret = 0;
880 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
881 if (ret < 0)
884 ret = !!(ret & sca3000_addresses[num][2]);
889 return ret;
898 int ret, len;
904 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
907 if (ret < 0)
908 return ret;
929 int ret;
933 ret = kstrtou8(buf, 10, &val);
934 if (ret)
938 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
939 if (ret)
944 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE,
948 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE,
953 return ret ? ret : len;
972 int ret, ctrlval;
981 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
982 if (ret < 0)
984 ctrlval = ret;
987 ret = sca3000_write_ctrl_reg(st,
991 if (ret)
995 ret = sca3000_write_ctrl_reg(st,
999 if (ret)
1005 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
1006 if (ret)
1011 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE,
1017 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE,
1022 return ret;
1057 int ret;
1061 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_STATUS, 1);
1062 if (ret)
1066 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1067 if (ret < 0)
1069 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL,
1070 ret & SCA3000_MD_CTRL_PROT_MASK);
1071 if (ret)
1075 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
1076 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
1077 (ret & SCA3000_OUT_CTRL_PROT_MASK)
1082 if (ret)
1085 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1);
1086 if (ret)
1088 ret = sca3000_write_reg(st,
1090 (ret & SCA3000_INT_MASK_PROT_MASK)
1092 if (ret)
1099 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1);
1100 if (ret)
1102 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE,
1108 return ret;
1124 int ret;
1153 ret = iio_device_register(indio_dev);
1154 if (ret < 0)
1155 return ret;
1157 ret = iio_buffer_register(indio_dev,
1160 if (ret < 0)
1169 ret = request_threaded_irq(spi->irq,
1175 if (ret)
1179 ret = sca3000_clean_setup(st);
1180 if (ret)
1191 return ret;
1196 int ret;
1199 ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1);
1200 if (ret)
1202 ret = sca3000_write_reg(st, SCA3000_REG_ADDR_INT_MASK,
1209 return ret;