Cross Reference: /drivers/tty/serial/imx.c

Lines Matching refs:membase
310 	ucr->ucr1 = readl(port->membase + UCR1);
311 	ucr->ucr2 = readl(port->membase + UCR2);
312 	ucr->ucr3 = readl(port->membase + UCR3);
319 	writel(ucr->ucr1, port->membase + UCR1);
320 	writel(ucr->ucr2, port->membase + UCR2);
321 	writel(ucr->ucr3, port->membase + UCR3);
382 		      !(readl(sport->port.membase + USR2) & USR2_TXDC)) {
396 		if (readl(sport->port.membase + USR2) & USR2_TXDC) {
397 			temp = readl(sport->port.membase + UCR1);
399 			writel(temp, sport->port.membase + UCR1);
401 			temp = readl(sport->port.membase + UCR4);
403 			writel(temp, sport->port.membase + UCR4);
405 			while (readl(sport->port.membase + URXD0) &
409 			temp = readl(sport->port.membase + UCR1);
411 			writel(temp, sport->port.membase + UCR1);
413 			temp = readl(sport->port.membase + UCR4);
415 			writel(temp, sport->port.membase + UCR4);
427 	temp = readl(sport->port.membase + UCR1);
428 	writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1);
448 	temp = readl(sport->port.membase + UCR2);
449 	writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2);
452 	temp = readl(sport->port.membase + UCR1);
453 	writel(temp & ~UCR1_RRDYEN, sport->port.membase + UCR1);
472 		writel(sport->port.x_char, sport->port.membase + URTX0);
482 	       !(readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)) {
485 		writel(xmit->buf[xmit->tail], sport->port.membase + URTX0);
585 		temp = readl(sport->port.membase + UCR4);
587 		writel(temp, sport->port.membase + UCR4);
589 		temp = readl(sport->port.membase + UCR1);
591 		writel(temp, sport->port.membase + UCR1);
594 	temp = readl(sport->port.membase + USR2);
595 	writel(temp | USR2_ORE, sport->port.membase + USR2);
597 	temp = readl(sport->port.membase + UCR4);
599 	writel(temp, sport->port.membase + UCR4);
602 		temp = readl(sport->port.membase + UCR1);
603 		writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1);
607 		temp = readl(sport->port.membase + UCR1);
609 		writel(temp, sport->port.membase + UCR1);
611 		temp = readl(sport->port.membase + UCR4);
613 		writel(temp, sport->port.membase + UCR4);
624 	if (readl(sport->port.membase + uts_reg(sport)) & UTS_TXEMPTY)
636 	writel(USR1_RTSD, sport->port.membase + USR1);
637 	val = readl(sport->port.membase + USR1) & USR1_RTSS;
665 	while (readl(sport->port.membase + USR2) & USR2_RDR) {
669 		rx = readl(sport->port.membase + URXD0);
671 		temp = readl(sport->port.membase + USR2);
673 			writel(USR2_BRCD, sport->port.membase + USR2);
731 	temp = readl(sport->port.membase + USR2);
736 		temp = readl(sport->port.membase + UCR1);
738 		writel(temp, sport->port.membase + UCR1);
751 	sts = readl(sport->port.membase + USR1);
761 			readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN)
768 		writel(USR1_AWAKE, sport->port.membase + USR1);
770 	sts2 = readl(sport->port.membase + USR2);
774 		writel(sts2 | USR2_ORE, sport->port.membase + USR2);
788 	ret = (readl(sport->port.membase + USR2) & USR2_TXDC) ?  TIOCSER_TEMT : 0;
805 	if (readl(sport->port.membase + USR1) & USR1_RTSS)
808 	if (readl(sport->port.membase + UCR2) & UCR2_CTS)
811 	if (readl(sport->port.membase + uts_reg(sport)) & UTS_LOOP)
822 	temp = readl(sport->port.membase + UCR2) & ~(UCR2_CTS | UCR2_CTSC);
826 	writel(temp, sport->port.membase + UCR2);
828 	temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP;
831 	writel(temp, sport->port.membase + uts_reg(sport));
844 	temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK;
849 	writel(temp, sport->port.membase + UCR1);
862 	val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE);
864 	writel(val, sport->port.membase + UFCR);
874 	temp = readl(sport->port.membase + UCR1);
876 	writel(temp, sport->port.membase + UCR1);
1032 	temp = readl(sport->port.membase + UCR1);
1036 	writel(temp, sport->port.membase + UCR1);
1039 	temp = readl(sport->port.membase + UCR4);
1041 	writel(temp, sport->port.membase + UCR4);
1051 	temp = readl(sport->port.membase + UCR1);
1053 	writel(temp, sport->port.membase + UCR1);
1056 	temp = readl(sport->port.membase + UCR2);
1058 	writel(temp, sport->port.membase + UCR2);
1061 	temp = readl(sport->port.membase + UCR4);
1063 	writel(temp, sport->port.membase + UCR4);
1091 	temp = readl(sport->port.membase + UCR4);
1100 	writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
1105 	temp = readl(sport->port.membase + UCR2);
1107 	writel(temp, sport->port.membase + UCR2);
1109 	while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) && (--i > 0))
1147 	writel(USR1_RTSD, sport->port.membase + USR1);
1149 	temp = readl(sport->port.membase + UCR1);
1157 	writel(temp, sport->port.membase + UCR1);
1159 	temp = readl(sport->port.membase + UCR2);
1163 	writel(temp, sport->port.membase + UCR2);
1166 		temp = readl(sport->port.membase + UCR3);
1168 		writel(temp, sport->port.membase + UCR3);
1172 		temp = readl(sport->port.membase + UCR4);
1177 		writel(temp | UCR4_DREN, sport->port.membase + UCR4);
1179 		temp = readl(sport->port.membase + UCR3);
1184 		writel(temp, sport->port.membase + UCR3);
1240 	temp = readl(sport->port.membase + UCR2);
1242 	writel(temp, sport->port.membase + UCR2);
1273 	temp = readl(sport->port.membase + UCR1);
1278 	writel(temp, sport->port.membase + UCR1);
1393 	old_ucr1 = readl(sport->port.membase + UCR1);
1395 			sport->port.membase + UCR1);
1397 	while (!(readl(sport->port.membase + USR2) & USR2_TXDC))
1401 	old_txrxen = readl(sport->port.membase + UCR2);
1403 			sport->port.membase + UCR2);
1437 	ufcr = readl(sport->port.membase + UFCR);
1441 	writel(ufcr, sport->port.membase + UFCR);
1443 	writel(num, sport->port.membase + UBIR);
1444 	writel(denom, sport->port.membase + UBMR);
1448 				sport->port.membase + IMX21_ONEMS);
1450 	writel(old_ucr1, sport->port.membase + UCR1);
1453 	writel(ucr2 | old_txrxen, sport->port.membase + UCR2);
1512 	if (!(readl(port->membase + USR2) & USR2_RDR))
1515 	return readl(port->membase + URXD0) & URXD_RX_DATA;
1527 	writel(UCR1_UARTEN, port->membase + UCR1);
1529 	       port->membase + UCR2);
1531 	       port->membase + UCR3);
1535 		status = readl(port->membase + USR1);
1539 	writel(c, port->membase + URTX0);
1543 		status = readl(port->membase + USR2);
1580 	while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)
1583 	writel(ch, sport->port.membase + URTX0);
1626 	writel(ucr1, sport->port.membase + UCR1);
1628 	writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2);
1636 	while (!(readl(sport->port.membase + USR2) & USR2_TXDC));
1656 	if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) {
1662 		ucr2 = readl(sport->port.membase + UCR2);
1677 		ubir = readl(sport->port.membase + UBIR) & 0xffff;
1678 		ubmr = readl(sport->port.membase + UBMR) & 0xffff;
1680 		ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7;
1791 	val = readl(sport->port.membase + UCR3);
1793 	writel(val, sport->port.membase + UCR3);
1806 	val = readl(sport->port.membase + UCR3);
1808 	writel(val, sport->port.membase + UCR3);
1902 	sport->port.membase = base;