Lines Matching refs:membase

111 							port->membase))) == 0)
125 port->membase))) < 32)
136 writel((u32)ch, LPC32XX_HSUART_FIFO(port->membase));
176 if (!port->membase)
253 while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) &&
255 tmp = readl(LPC32XX_HSUART_FIFO(port->membase));
264 tmp = readl(LPC32XX_HSUART_FIFO(port->membase));
272 LPC32XX_HSUART_IIR(port->membase));
280 tmp = readl(LPC32XX_HSUART_FIFO(port->membase));
294 writel((u32)port->x_char, LPC32XX_HSUART_FIFO(port->membase));
305 LPC32XX_HSUART_LEVEL(port->membase))) < 64) {
307 LPC32XX_HSUART_FIFO(port->membase));
319 tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
321 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
334 status = readl(LPC32XX_HSUART_IIR(port->membase));
338 writel(LPC32XX_HSU_BRK_INT, LPC32XX_HSUART_IIR(port->membase));
345 writel(LPC32XX_HSU_FE_INT, LPC32XX_HSUART_IIR(port->membase));
350 LPC32XX_HSUART_IIR(port->membase));
362 writel(LPC32XX_HSU_TX_INT, LPC32XX_HSUART_IIR(port->membase));
376 if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0)
401 tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
403 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
412 tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
414 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
422 tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
424 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
427 LPC32XX_HSU_FE_INT), LPC32XX_HSUART_IIR(port->membase));
438 tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
443 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
489 LPC32XX_HSUART_IIR(port->membase));
491 writel(0xFF, LPC32XX_HSUART_RATE(port->membase));
499 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
509 LPC32XX_HSUART_CTRL(port->membase));
524 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
556 tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
561 writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
563 writel(quot, LPC32XX_HSUART_RATE(port->membase));
583 iounmap(port->membase);
584 port->membase = NULL;
601 port->membase = ioremap(port->mapbase, SZ_4K);
602 if (!port->membase) {
626 LPC32XX_HSUART_IIR(port->membase));
628 writel(0xFF, LPC32XX_HSUART_RATE(port->membase));
634 LPC32XX_HSUART_CTRL(port->membase));
692 p->port.membase = NULL;