Lines Matching refs:uhci

81 #define UHCI_PTR_BITS(uhci)	cpu_to_hc32((uhci), 0x000F)
82 #define UHCI_PTR_TERM(uhci) cpu_to_hc32((uhci), 0x0001)
83 #define UHCI_PTR_QH(uhci) cpu_to_hc32((uhci), 0x0002)
84 #define UHCI_PTR_DEPTH(uhci) cpu_to_hc32((uhci), 0x0004)
85 #define UHCI_PTR_BREADTH(uhci) cpu_to_hc32((uhci), 0x0000)
189 #define LINK_TO_QH(uhci, qh) (UHCI_PTR_QH((uhci)) | \
190 cpu_to_hc32((uhci), (qh)->dma_handle))
223 #define td_token(uhci, td) hc32_to_cpu((uhci), (td)->token)
274 #define td_status(uhci, td) hc32_to_cpu((uhci), \
277 #define LINK_TO_TD(uhci, td) (cpu_to_hc32((uhci), (td)->dma_handle))
447 void (*reset_hc) (struct uhci_hcd *uhci);
448 int (*check_and_reset_hc) (struct uhci_hcd *uhci);
450 void (*configure_hc) (struct uhci_hcd *uhci);
452 int (*resume_detect_interrupts_are_broken) (struct uhci_hcd *uhci);
454 int (*global_suspend_mode_is_broken) (struct uhci_hcd *uhci);
462 static inline struct usb_hcd *uhci_to_hcd(struct uhci_hcd *uhci)
464 return container_of((void *) uhci, struct usb_hcd, hcd_priv);
501 static inline u32 uhci_readl(const struct uhci_hcd *uhci, int reg)
503 return inl(uhci->io_addr + reg);
506 static inline void uhci_writel(const struct uhci_hcd *uhci, u32 val, int reg)
508 outl(val, uhci->io_addr + reg);
511 static inline u16 uhci_readw(const struct uhci_hcd *uhci, int reg)
513 return inw(uhci->io_addr + reg);
516 static inline void uhci_writew(const struct uhci_hcd *uhci, u16 val, int reg)
518 outw(val, uhci->io_addr + reg);
521 static inline u8 uhci_readb(const struct uhci_hcd *uhci, int reg)
523 return inb(uhci->io_addr + reg);
526 static inline void uhci_writeb(const struct uhci_hcd *uhci, u8 val, int reg)
528 outb(val, uhci->io_addr + reg);
548 static inline u32 uhci_readl(const struct uhci_hcd *uhci, int reg)
550 if (uhci_has_pci_registers(uhci))
551 return inl(uhci->io_addr + reg);
553 else if (uhci_big_endian_mmio(uhci))
554 return readl_be(uhci->regs + reg);
557 return readl(uhci->regs + reg);
560 static inline void uhci_writel(const struct uhci_hcd *uhci, u32 val, int reg)
562 if (uhci_has_pci_registers(uhci))
563 outl(val, uhci->io_addr + reg);
565 else if (uhci_big_endian_mmio(uhci))
566 writel_be(val, uhci->regs + reg);
569 writel(val, uhci->regs + reg);
572 static inline u16 uhci_readw(const struct uhci_hcd *uhci, int reg)
574 if (uhci_has_pci_registers(uhci))
575 return inw(uhci->io_addr + reg);
577 else if (uhci_big_endian_mmio(uhci))
578 return readw_be(uhci->regs + reg);
581 return readw(uhci->regs + reg);
584 static inline void uhci_writew(const struct uhci_hcd *uhci, u16 val, int reg)
586 if (uhci_has_pci_registers(uhci))
587 outw(val, uhci->io_addr + reg);
589 else if (uhci_big_endian_mmio(uhci))
590 writew_be(val, uhci->regs + reg);
593 writew(val, uhci->regs + reg);
596 static inline u8 uhci_readb(const struct uhci_hcd *uhci, int reg)
598 if (uhci_has_pci_registers(uhci))
599 return inb(uhci->io_addr + reg);
601 else if (uhci_big_endian_mmio(uhci))
602 return readb_be(uhci->regs + reg);
605 return readb(uhci->regs + reg);
608 static inline void uhci_writeb(const struct uhci_hcd *uhci, u8 val, int reg)
610 if (uhci_has_pci_registers(uhci))
611 outb(val, uhci->io_addr + reg);
613 else if (uhci_big_endian_mmio(uhci))
614 writeb_be(val, uhci->regs + reg);
617 writeb(val, uhci->regs + reg);
630 /* cpu to uhci */
631 static inline __hc32 cpu_to_hc32(const struct uhci_hcd *uhci, const u32 x)
633 return uhci_big_endian_desc(uhci)
638 /* uhci to cpu */
639 static inline u32 hc32_to_cpu(const struct uhci_hcd *uhci, const __hc32 x)
641 return uhci_big_endian_desc(uhci)
647 /* cpu to uhci */
648 static inline __hc32 cpu_to_hc32(const struct uhci_hcd *uhci, const u32 x)
653 /* uhci to cpu */
654 static inline u32 hc32_to_cpu(const struct uhci_hcd *uhci, const __hc32 x)