Cross Reference: /drivers/video/fbdev/matrox/matroxfb

Lines Matching refs:reg
92 void matroxfb_DAC_out(const struct matrox_fb_info *minfo, int reg, int val)
95 	mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
99 int matroxfb_DAC_in(const struct matrox_fb_info *minfo, int reg)
102 	mga_outb(M_RAMDAC_BASE+M_X_INDEX, reg);
547 	minfo->values.reg.mctlwtst	= 0x00030101;
557 	minfo->values.reg.mctlwtst	= 0x00030101;
565 	minfo->values.reg.mctlwtst	= ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
579 	minfo->values.reg.mctlwtst	= 0x00030101;
589 	minfo->values.reg.mctlwtst	= get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
592 	minfo->values.reg.memrdbk	= ((bd->pins[57] << 21) & 0x1E000000) |
596 	minfo->values.reg.opt		= (bd->pins[54] & 7) << 10;
597 	minfo->values.reg.opt2		= bd->pins[58] << 12;
607 	minfo->values.reg.mctlwtst	= 0x01250A21;
608 	minfo->values.reg.memrdbk	= 0x00000000;
609 	minfo->values.reg.opt		= 0x00000C00;
610 	minfo->values.reg.opt2		= 0x00000000;
619 	minfo->values.reg.mctlwtst	= get_unaligned_le32(bd->pins + 71);
620 	minfo->values.reg.memrdbk	= ((bd->pins[87] << 21) & 0x1E000000) |
624 	minfo->values.reg.opt		= ((bd->pins[53] << 15) & 0x00400000) |
627 	minfo->values.reg.opt3		= get_unaligned_le32(bd->pins + 67);
638 	minfo->values.reg.mctlwtst	= 0x04A450A1;
639 	minfo->values.reg.memrdbk	= 0x000000E7;
640 	minfo->values.reg.opt		= 0x10000400;
641 	minfo->values.reg.opt3		= 0x0190A419;
661 	minfo->values.reg.opt		= get_unaligned_le32(bd->pins + 48);
662 	minfo->values.reg.opt2		= get_unaligned_le32(bd->pins + 52);
663 	minfo->values.reg.opt3		= get_unaligned_le32(bd->pins + 94);
664 	minfo->values.reg.mctlwtst	= get_unaligned_le32(bd->pins + 98);
665 	minfo->values.reg.memmisc	= get_unaligned_le32(bd->pins + 102);
666 	minfo->values.reg.memrdbk	= get_unaligned_le32(bd->pins + 106);
671 	minfo->values.reg.maccess	= minfo->values.memory.emrswen ? 0x00004000 : 0x00000000;
673 		minfo->values.reg.mctlwtst_core = minfo->values.reg.mctlwtst;
676 		minfo->values.reg.mctlwtst_core = (minfo->values.reg.mctlwtst & ~7) |
677 						  wtst_xlat[minfo->values.reg.mctlwtst & 7];
694 	minfo->values.reg.opt		= 0x404A1160;
695 	minfo->values.reg.opt2		= 0x0000AC00;
696 	minfo->values.reg.opt3		= 0x0090A409;
697 	minfo->values.reg.mctlwtst_core	=
698 	minfo->values.reg.mctlwtst	= 0x0C81462B;
699 	minfo->values.reg.memmisc	= 0x80000004;
700 	minfo->values.reg.memrdbk	= 0x01001103;
705 	minfo->values.reg.maccess	= 0x00004000;
802 	       (minfo->values.reg.opt & 0x1C00) >> 10);