Lines Matching refs:reg_base
47 void *reg_base =
51 writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR);
55 writel_relaxed((u8)data, reg_base + LCD_SPU_SPI_TXDATA);
58 writel_relaxed((u16)data, reg_base + LCD_SPU_SPI_TXDATA);
61 writel_relaxed((u32)data, reg_base + LCD_SPU_SPI_TXDATA);
68 tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL);
71 writel(tmp, reg_base + LCD_SPU_SPI_CTRL);
73 isr = readl_relaxed(reg_base + SPU_IRQ_ISR);
76 isr = readl_relaxed(reg_base + SPU_IRQ_ISR);
84 tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL);
87 writel_relaxed(tmp, reg_base + LCD_SPU_SPI_CTRL);
89 writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR);
96 void *reg_base =
104 writel(tmp, reg_base + LCD_SPU_SPI_CTRL);
111 tmp = readl_relaxed(reg_base + SPU_IOPAD_CONTROL);
115 reg_base + SPU_IOPAD_CONTROL);
162 *p_regbase = ctrl->reg_base;