Searched defs:CSR0_STOP (Results 1 - 5 of 5) sorted by relevance

/drivers/net/ethernet/amd/
H A Dni65.h32 #define CSR0_STOP 0x0004 /* Stop (RS) */ macro
H A Dam79c961a.h33 #define CSR0_STOP 0x0004 macro
H A Dsun3lance.c213 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
332 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
334 if(ioaddr_probe[0] != CSR0_STOP) {
359 REGA(CSR0) = CSR0_STOP;
424 REGA(CSR0) = CSR0_STOP;
438 DREG = CSR0_STOP;
532 DREG = CSR0_STOP;
589 REGA( CSR0 ) = CSR0_STOP;
717 REGA(CSR0) = CSR0_STOP;
755 REGA(CSR0) = CSR0_STOP;
[all...]
H A Datarilance.c314 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
510 ioaddr[0] = CSR0_INIT | CSR0_STOP;
511 if (ioaddr[0] != CSR0_STOP) {
517 ioaddr[0] = CSR0_STOP;
518 if (ioaddr[0] != CSR0_STOP) {
538 REGA( CSR0 ) = CSR0_STOP;
665 DREG = CSR0_STOP;
738 DREG = CSR0_STOP;
872 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
1062 DREG = CSR0_STOP;
[all...]
H A Dpcnet32.c199 #define CSR0_STOP 0x4 macro
797 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
893 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
907 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
980 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
1394 if (!(csr0 & CSR0_STOP)) /* If not stopped */
1431 if (!(csr0 & CSR0_STOP)) { /* If not stopped */
2346 if (lp->a->read_csr(ioaddr, CSR0) & CSR0_STOP)
2377 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
2556 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
[all...]

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