Searched defs:DMA1_IRQ_STATUS (Results 1 - 7 of 7) sorted by relevance

/arch/blackfin/mach-bf527/include/mach/
H A DdefBF522.h244 #define DMA1_IRQ_STATUS 0xFFC00C68 /* DMA Channel 1 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf533/include/mach/
H A DdefBF532.h211 #define DMA1_IRQ_STATUS 0xFFC00C68 /* DMA Channel 1 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf518/include/mach/
H A DdefBF512.h244 #define DMA1_IRQ_STATUS 0xFFC00C68 /* DMA Channel 1 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h220 #define DMA1_IRQ_STATUS 0xFFC00C68 /* DMA Channel 1 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h221 #define DMA1_IRQ_STATUS 0xFFC00C68 /* DMA Channel 1 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h232 #define DMA1_IRQ_STATUS 0xffc00c68 /* DMA Channel 1 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf609/include/mach/
H A DdefBF60x_base.h1551 #define DMA1_IRQ_STATUS 0xFFC410B0 /* DMA1 Status Register */ macro

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