Searched defs:DMA5_IRQ_STATUS (Results 1 - 7 of 7) sorted by relevance

/arch/blackfin/mach-bf527/include/mach/
H A DdefBF522.h300 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf533/include/mach/
H A DdefBF532.h267 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf518/include/mach/
H A DdefBF512.h300 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h276 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h277 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h296 #define DMA5_IRQ_STATUS 0xffc00d68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf609/include/mach/
H A DdefBF60x_base.h1635 #define DMA5_IRQ_STATUS 0xFFC412B0 /* DMA5 Status Register */ macro

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