Searched defs:L1_CACHE_BYTES (Results 1 - 25 of 31) sorted by relevance

12

/arch/alpha/include/asm/
H A Dcache.h10 # define L1_CACHE_BYTES 64 macro
16 # define L1_CACHE_BYTES 32 macro
20 #define SMP_CACHE_BYTES L1_CACHE_BYTES
/arch/cris/include/arch-v10/arch/
H A Dcache.h5 #define L1_CACHE_BYTES 32 macro
/arch/m32r/include/asm/
H A Dcache.h6 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
/arch/m68k/include/asm/
H A Dcache.h9 #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) macro
11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/arch/microblaze/include/asm/
H A Dcache.h20 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
22 #define SMP_CACHE_BYTES L1_CACHE_BYTES
/arch/openrisc/include/asm/
H A Dcache.h26 #define L1_CACHE_BYTES 16 macro
/arch/score/include/asm/
H A Dcache.h5 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
/arch/um/include/asm/
H A Dcache.h15 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
/arch/unicore32/include/asm/
H A Dcache.h16 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
25 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/arch/cris/include/arch-v32/arch/
H A Dcache.h7 #define L1_CACHE_BYTES 32 macro
/arch/frv/include/asm/
H A Dcache.h18 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
20 #define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
21 #define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
/arch/s390/include/asm/
H A Dcache.h12 #define L1_CACHE_BYTES 256 macro
/arch/arm/include/asm/
H A Dcache.h8 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
17 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/arch/arm64/include/asm/
H A Dcache.h22 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
31 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
38 return cwg ? 4 << cwg : L1_CACHE_BYTES;
/arch/hexagon/include/asm/
H A Dcache.h26 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
28 #define __cacheline_aligned __aligned(L1_CACHE_BYTES)
29 #define ____cacheline_aligned __aligned(L1_CACHE_BYTES)
/arch/ia64/include/asm/
H A Dcache.h12 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
16 # define SMP_CACHE_BYTES L1_CACHE_BYTES
/arch/metag/include/asm/
H A Dcache.h6 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
16 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/arch/mips/include/asm/
H A Dcache.h15 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
18 #define SMP_CACHE_BYTES L1_CACHE_BYTES
/arch/sparc/include/asm/
H A Dcache.h13 #define L1_CACHE_BYTES 32 macro
/arch/x86/include/asm/
H A Dcache.h8 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
/arch/xtensa/include/asm/
H A Dcache.h17 #define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE macro
18 #define SMP_CACHE_BYTES L1_CACHE_BYTES
32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/arch/blackfin/include/asm/
H A Dcache.h17 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) macro
18 #define SMP_CACHE_BYTES L1_CACHE_BYTES
20 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES
32 __attribute__((__aligned__(L1_CACHE_BYTES), \
/arch/mn10300/proc-mn103e010/include/proc/
H A Dcache.h18 #define L1_CACHE_BYTES 16 /* bytes per entry */ macro
39 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
41 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
/arch/mn10300/proc-mn2ws0050/include/proc/
H A Dcache.h24 #define L1_CACHE_BYTES 32 /* bytes per entry */ macro
45 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
47 +(L1_CACHE_NWAYS * L1_CACHE_NENTRIES * L1_CACHE_BYTES)
/arch/parisc/include/asm/
H A Dcache.h18 #define L1_CACHE_BYTES 64 macro
21 #define L1_CACHE_BYTES 32 macro
27 #define SMP_CACHE_BYTES L1_CACHE_BYTES
29 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES

Completed in 1154 milliseconds

12