Searched defs:PTRS_PER_PMD (Results 1 - 23 of 23) sorted by relevance

/arch/powerpc/include/asm/
H A Dpgtable-ppc64-64k.h19 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) macro
H A Dpgtable-ppc64-4k.h21 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) macro
H A Dpgtable-ppc32.h44 #define PTRS_PER_PMD 1 macro
/arch/x86/include/asm/
H A Dpgtable-3level_types.h40 #define PTRS_PER_PMD 512 macro
H A Dpgtable_64_types.h42 #define PTRS_PER_PMD 512 macro
/arch/sh/include/asm/
H A Dpgtable-3level.h25 #define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE) macro
39 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
/arch/m32r/include/asm/
H A Dpgtable-2level.h17 #define PTRS_PER_PMD 1 macro
/arch/m68k/include/asm/
H A Dpgtable_mm.h57 #define PTRS_PER_PMD 1 macro
61 #define PTRS_PER_PMD 1 macro
65 #define PTRS_PER_PMD 8 macro
/arch/um/include/asm/
H A Dpgtable-3level.h36 #define PTRS_PER_PMD 512 macro
39 #define PTRS_PER_PMD 1024 macro
/arch/arm/include/asm/
H A Dpgtable-2level.h72 #define PTRS_PER_PMD 1 macro
H A Dpgtable-3level.h33 #define PTRS_PER_PMD 512 macro
169 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
/arch/tile/include/asm/
H A Dpgtable_64.h29 * of PTRS_PER_PMD pgd_t's and is the middle level of the page table.
34 #define PTRS_PER_PMD _HV_L1_ENTRIES(HPAGE_SHIFT) macro
/arch/arm64/include/asm/
H A Dpgtable-hwdef.h28 #define PTRS_PER_PMD PTRS_PER_PTE macro
/arch/mips/include/asm/
H A Dpgtable-64.h29 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
113 #define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t)) macro
132 min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
165 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
244 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
/arch/alpha/include/asm/
H A Dpgtable.h45 #define PTRS_PER_PMD (1UL << (PAGE_SHIFT-3)) macro
/arch/microblaze/include/asm/
H A Dpgtable.h158 #define PTRS_PER_PMD 1 macro
/arch/sparc/include/asm/
H A Dpgtable_32.h44 #define PTRS_PER_PMD SRMMU_PTRS_PER_PMD macro
331 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
H A Dpgtable_64.h91 #define PTRS_PER_PMD (1UL << PMD_BITS) macro
861 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)))
/arch/frv/include/asm/
H A Dpgtable.h139 #define PTRS_PER_PMD 1 macro
/arch/ia64/include/asm/
H A Dpgtable.h103 #define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT)) macro
399 ((pmd_t *) pud_page_vaddr(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
/arch/mn10300/include/asm/
H A Dpgtable.h59 #define PTRS_PER_PMD 1 /* we don't really have any PMD physically */ macro
443 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
449 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
/arch/parisc/include/asm/
H A Dpgtable.h101 #define PTRS_PER_PMD (1UL << BITS_PER_PMD) macro
407 ((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
/arch/s390/include/asm/
H A Dpgtable.h94 #define PTRS_PER_PMD 1 macro
97 #define PTRS_PER_PMD 2048 macro
1362 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))

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