Searched defs:ah (Results 1 - 25 of 131) sorted by relevance

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/drivers/infiniband/hw/mlx5/
H A Dah.c36 struct mlx5_ib_ah *ah)
39 memcpy(ah->av.rgid, &ah_attr->grh.dgid, 16);
40 ah->av.grh_gid_fl = cpu_to_be32(ah_attr->grh.flow_label |
43 ah->av.hop_limit = ah_attr->grh.hop_limit;
44 ah->av.tclass = ah_attr->grh.traffic_class;
47 ah->av.rlid = cpu_to_be16(ah_attr->dlid);
48 ah->av.fl_mlid = ah_attr->src_path_bits & 0x7f;
49 ah->av.stat_rate_sl = (ah_attr->static_rate << 4) | (ah_attr->sl & 0xf);
51 return &ah->ibah;
56 struct mlx5_ib_ah *ah; local
35 create_ib_ah(struct ib_ah_attr *ah_attr, struct mlx5_ib_ah *ah) argument
67 struct mlx5_ib_ah *ah = to_mah(ibah); local
88 mlx5_ib_destroy_ah(struct ib_ah *ah) argument
[all...]
/drivers/net/wireless/ath/ath5k/
H A Dcaps.c33 int ath5k_hw_set_capabilities(struct ath5k_hw *ah) argument
35 struct ath5k_capabilities *caps = &ah->ah_capabilities;
41 if (ah->ah_version == AR5K_AR5210) {
83 ah->ah_version != AR5K_AR5211)) {
97 ah->ah_version != AR5K_AR5211)
104 if ((ah->ah_radio_5ghz_revision & 0xf0) == AR5K_SREV_RAD_2112)
108 if (ah->ah_version == AR5K_AR5210)
114 if (ah->ah_mac_srev >= AR5K_SREV_AR5213A)
120 if (ah->ah_version == AR5K_AR5212)
133 int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u argument
145 ath5k_hw_disable_pspoll(struct ath5k_hw *ah) argument
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H A Dgpio.c45 * @ah: The &struct ath5k_hw
53 ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state) argument
60 if (ah->ah_version != AR5K_AR5210)
61 AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG,
64 AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_LED);
94 if (ah->ah_version != AR5K_AR5210)
95 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led);
97 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led_5210);
102 * @ah: The &struct ath5k_hw
106 ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u3 argument
124 ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio) argument
142 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio) argument
159 ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val) argument
189 ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level) argument
[all...]
H A Drfkill.c39 static inline void ath5k_rfkill_disable(struct ath5k_hw *ah) argument
41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
48 static inline void ath5k_rfkill_enable(struct ath5k_hw *ah) argument
56 ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable) argument
67 ath5k_is_rfkill_set(struct ath5k_hw *ah) argument
78 struct ath5k_hw *ah = (void *)data; local
87 ath5k_rfkill_hw_start(struct ath5k_hw *ah) argument
105 ath5k_rfkill_hw_stop(struct ath5k_hw *ah) argument
[all...]
H A Dsysfs.c15 struct ath5k_hw *ah = hw->priv; \
24 struct ath5k_hw *ah = hw->priv; \
30 set(ah, val); \
42 struct ath5k_hw *ah = hw->priv; \
49 SIMPLE_SHOW_STORE(ani_mode, ah->ani_state.ani_mode, ath5k_ani_init);
50 SIMPLE_SHOW_STORE(noise_immunity_level, ah->ani_state.noise_imm_level,
52 SIMPLE_SHOW_STORE(spur_level, ah->ani_state.spur_level,
54 SIMPLE_SHOW_STORE(firstep_level, ah->ani_state.firstep_level,
56 SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, ah->ani_state.ofdm_weak_sig,
58 SIMPLE_SHOW_STORE(cck_weak_signal_detection, ah
102 ath5k_sysfs_register(struct ath5k_hw *ah) argument
117 ath5k_sysfs_unregister(struct ath5k_hw *ah) argument
[all...]
H A Dattach.c33 * @ah: The &struct ath5k_hw
35 static int ath5k_hw_post(struct ath5k_hw *ah) argument
54 init_val = ath5k_hw_reg_read(ah, cur_reg);
58 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
59 cur_val = ath5k_hw_reg_read(ah, cur_reg);
62 ATH5K_ERR(ah, "POST Failed !!!\n");
68 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
73 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
74 cur_val = ath5k_hw_reg_read(ah, cur_reg);
77 ATH5K_ERR(ah, "POS
104 ath5k_hw_init(struct ath5k_hw *ah) argument
350 ath5k_hw_deinit(struct ath5k_hw *ah) argument
[all...]
H A Ddebug.h129 ath5k_debug_init_device(struct ath5k_hw *ah);
132 ath5k_debug_printrxbuffs(struct ath5k_hw *ah);
135 ath5k_debug_dump_bands(struct ath5k_hw *ah);
138 ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf);
145 ATH5K_DBG(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...) {} argument
148 ATH5K_DBG_UNLIMIT(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...) argument
152 ath5k_debug_init_device(struct ath5k_hw *ah) {} argument
155 ath5k_debug_printrxbuffs(struct ath5k_hw *ah) {} argument
158 ath5k_debug_dump_bands(struct ath5k_hw *ah) {} argument
161 ath5k_debug_printtxbuf(struct ath5k_hw *ah, struc argument
[all...]
H A Dled.c90 void ath5k_led_enable(struct ath5k_hw *ah) argument
92 if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
93 ath5k_hw_set_gpio_output(ah, ah->led_pin);
94 ath5k_led_off(ah);
98 static void ath5k_led_on(struct ath5k_hw *ah) argument
100 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
102 ath5k_hw_set_gpio(ah, ah->led_pin, ah
105 ath5k_led_off(struct ath5k_hw *ah) argument
126 ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led, const char *name, char *trigger) argument
156 ath5k_unregister_leds(struct ath5k_hw *ah) argument
162 ath5k_init_leds(struct ath5k_hw *ah) argument
[all...]
H A Dinitvals.c1374 * @ah: The &struct ath5k_hw
1380 ath5k_hw_ini_registers(struct ath5k_hw *ah, unsigned int size, argument
1397 ath5k_hw_reg_read(ah, ini_regs[i].ini_register);
1402 ath5k_hw_reg_write(ah, ini_regs[i].ini_value,
1410 * @ah: The &struct ath5k_hw
1416 ath5k_hw_ini_mode_registers(struct ath5k_hw *ah, argument
1424 ath5k_hw_reg_write(ah, ini_mode[i].mode_value[mode],
1432 * @ah: The &struct ath5k_hw
1440 ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool skip_pcu) argument
1447 if (ah
[all...]
H A Dpci.c58 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv; local
61 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp);
80 struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; local
86 if (ah->ah_version == AR5K_AR5210) {
87 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_EEAE);
88 (void)ath5k_hw_reg_read(ah, AR5K_EEPROM_BASE + (4 * offset));
90 ath5k_hw_reg_write(ah, offset, AR5K_EEPROM_BASE);
91 AR5K_REG_ENABLE_BITS(ah, AR5K_EEPROM_CMD,
96 status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATU
110 ath5k_hw_read_srev(struct ath5k_hw *ah) argument
119 ath5k_pci_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) argument
163 struct ath5k_hw *ah; local
292 struct ath5k_hw *ah = hw->priv; local
306 struct ath5k_hw *ah = hw->priv; local
316 struct ath5k_hw *ah = hw->priv; local
[all...]
H A Dqcu.c59 * @ah: The &struct ath5k_hw
63 ath5k_hw_num_tx_pending(struct ath5k_hw *ah, unsigned int queue) argument
66 AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);
69 if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)
73 if (ah->ah_version == AR5K_AR5210)
76 pending = ath5k_hw_reg_read(ah, AR5K_QUEUE_STATUS(queue));
82 if (!pending && AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
90 * @ah: The &struct ath5k_hw
94 ath5k_hw_release_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
96 if (WARN_ON(queue >= ah
138 ath5k_hw_get_tx_queueprops(struct ath5k_hw *ah, int queue, struct ath5k_txq_info *queue_info) argument
154 ath5k_hw_set_tx_queueprops(struct ath5k_hw *ah, int queue, const struct ath5k_txq_info *qinfo) argument
203 ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, struct ath5k_txq_info *queue_info) argument
287 ath5k_hw_set_tx_retry_limits(struct ath5k_hw *ah, unsigned int queue) argument
330 ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) argument
565 ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) argument
696 ath5k_hw_init_queues(struct ath5k_hw *ah) argument
[all...]
/drivers/infiniband/hw/mlx4/
H A Dah.c43 struct mlx4_ib_ah *ah)
47 ah->av.ib.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24));
48 ah->av.ib.g_slid = ah_attr->src_path_bits;
50 ah->av.ib.g_slid |= 0x80;
51 ah->av.ib.gid_index = ah_attr->grh.sgid_index;
52 ah->av.ib.hop_limit = ah_attr->grh.hop_limit;
53 ah->av.ib.sl_tclass_flowlabel |=
56 memcpy(ah->av.ib.dgid, ah_attr->grh.dgid.raw, 16);
59 ah->av.ib.dlid = cpu_to_be16(ah_attr->dlid);
61 ah
42 create_ib_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, struct mlx4_ib_ah *ah) argument
71 create_iboe_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr, struct mlx4_ib_ah *ah) argument
114 struct mlx4_ib_ah *ah; local
146 struct mlx4_ib_ah *ah = to_mah(ibah); local
173 mlx4_ib_destroy_ah(struct ib_ah *ah) argument
[all...]
/drivers/net/wireless/ath/
H A Dhw.c120 void *ah = common->ah; local
123 REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
124 id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;
126 REG_WRITE(ah, AR_STA_ID1, id1);
128 REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
129 REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
145 void *ah = common->ah; local
148 REG_WRITE(ah, AR_MIB
[all...]
/drivers/net/wireless/ath/ath9k/
H A Dcommon-init.c127 struct ath_hw *ah = (struct ath_hw *)common->ah; local
134 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
135 channels = devm_kzalloc(ah->dev,
151 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
152 channels = devm_kzalloc(ah->dev,
172 void ath9k_cmn_setup_ht_cap(struct ath_hw *ah, argument
175 struct ath_common *common = ath9k_hw_common(ah);
185 if (ah->caps.hw_caps & ATH9K_HW_CAP_LDPC)
188 if (ah
230 ath9k_cmn_reload_chainmask(struct ath_hw *ah) argument
[all...]
H A Dahb.c88 struct ath_hw *ah; local
144 ah = sc->sc_ah;
145 ath9k_hw_name(ah, hw_name, sizeof(hw_name));
H A Dar9003_rtt.c38 void ar9003_hw_rtt_enable(struct ath_hw *ah) argument
40 REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
43 void ar9003_hw_rtt_disable(struct ath_hw *ah) argument
45 REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
48 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask) argument
50 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
54 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah) argument
56 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
61 REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
64 if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTR
72 ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain, u32 index, u32 data28) argument
104 ar9003_hw_rtt_load_hist(struct ath_hw *ah) argument
121 ar9003_hw_patch_rtt(struct ath_hw *ah, int index, int chain) argument
142 ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index) argument
169 ar9003_hw_rtt_fill_hist(struct ath_hw *ah) argument
191 ar9003_hw_rtt_clear_hist(struct ath_hw *ah) argument
206 ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
H A Dar9003_wow.c37 static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah) argument
39 struct ath_common *common = ath9k_hw_common(ah);
41 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
44 REG_WRITE(ah, AR_CR, AR_CR_RXD);
46 if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
48 REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
52 REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
55 static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah) argument
57 struct ath_common *common = ath9k_hw_common(ah);
106 ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern, u8 *user_mask, int pattern_count, int pattern_len) argument
174 ath9k_hw_wow_wakeup(struct ath_hw *ah) argument
242 ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) argument
[all...]
H A Dcommon-beacon.c36 static u32 ath9k_get_next_tbtt(struct ath_hw *ah, u64 tsf, argument
41 tsf += TU_TO_USEC(FUDGE + ah->config.sw_beacon_response_time);
55 int ath9k_cmn_beacon_config_sta(struct ath_hw *ah, argument
59 struct ath_common *common = ath9k_hw_common(ah);
83 tsf = ath9k_hw_gettsf64(ah);
84 conf->nexttbtt = ath9k_get_next_tbtt(ah, tsf, conf->intval);
91 bs->bs_nextdtim = ath9k_get_next_tbtt(ah, tsf, dtim_intval);
128 void ath9k_cmn_beacon_config_adhoc(struct ath_hw *ah, argument
131 struct ath_common *common = ath9k_hw_common(ah);
138 conf->nexttbtt = ath9k_get_next_tbtt(ah, ath9k_hw_gettsf6
158 ath9k_cmn_beacon_config_ap(struct ath_hw *ah, struct ath_beacon_config *conf, unsigned int bc_buf) argument
[all...]
H A Ddfs.c34 static u32 dur_to_usecs(struct ath_hw *ah, u32 dur) argument
40 if (IS_CHAN_A_FAST_CLOCK(ah, ah->curchan))
142 struct ath_hw *ah = sc->sc_ah; local
143 struct ath_common *common = ath9k_hw_common(ah);
177 pe.freq = ah->curchan->channel;
H A Dwow.c45 struct ath_hw *ah = sc->sc_ah; local
46 struct ath_common *common = ath9k_hw_common(ah);
122 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
132 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
140 struct ath_hw *ah = sc->sc_ah; local
177 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
191 struct ath_hw *ah = sc->sc_ah; local
192 struct ath_common *common = ath9k_hw_common(ah);
265 sc->wow_intr_before_sleep = ah->imask;
266 ah
295 struct ath_hw *ah = sc->sc_ah; local
[all...]
/drivers/infiniband/core/
H A Dagent.c88 struct ib_ah *ah; local
102 ah = ib_create_ah_from_wc(agent->qp->pd, wc, grh, port_num);
103 if (IS_ERR(ah)) {
105 PTR_ERR(ah));
118 send_buf->ah = ah;
135 ib_destroy_ah(ah);
141 ib_destroy_ah(mad_send_wc->send_buf->ah);
/drivers/infiniband/hw/ehca/
H A Dehca_av.c168 int ehca_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr) argument
172 struct ehca_shca *shca = container_of(ah->pd->device, struct ehca_shca,
196 rc = ehca_query_port(ah->device, ah_attr->port_num,
199 ehca_err(ah->device, "Invalid port number "
201 "ah=%p ah_attr=%p port_num=%x",
202 rc, ah, ah_attr, ah_attr->port_num);
206 rc = ehca_query_gid(ah->device,
210 ehca_err(ah->device, "Failed to retrieve sgid "
212 "ah=%p ah_attr=%p port_num=%x "
214 rc, ah, ah_att
232 ehca_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr) argument
255 ehca_destroy_ah(struct ib_ah *ah) argument
[all...]
/drivers/ata/
H A Dpata_rb532_cf.c59 struct ata_host *ah = dev_instance; local
60 struct rb532_cf_info *info = ah->private_data;
85 static void rb532_pata_setup_ports(struct ata_host *ah) argument
87 struct rb532_cf_info *info = ah->private_data;
90 ap = ah->ports[0];
110 struct ata_host *ah; local
139 ah = ata_host_alloc(&pdev->dev, RB500_CF_MAXPORTS);
140 if (!ah)
143 platform_set_drvdata(pdev, ah);
149 ah
182 struct ata_host *ah = platform_get_drvdata(pdev); local
[all...]
/drivers/block/aoe/
H A Daoenet.c134 struct aoe_atahdr *ah; local
147 sn = sizeof(*h) + sizeof(*ah);
/drivers/infiniband/hw/ocrdma/
H A Docrdma_ah.c40 static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah, argument
72 ah->sgid_index = attr->grh.sgid_index;
83 memcpy(&ah->av->eth_hdr, &eth, eth_sz);
84 memcpy((u8 *)ah->av + eth_sz, &grh, sizeof(struct ocrdma_grh));
86 ah->av->valid |= OCRDMA_AV_VLAN_VALID;
87 ah->av->valid = cpu_to_le32(ah->av->valid);
95 struct ocrdma_ah *ah; local
106 ah = kzalloc(sizeof(*ah), GFP_ATOMI
153 struct ocrdma_ah *ah = get_ocrdma_ah(ibah); local
163 struct ocrdma_ah *ah = get_ocrdma_ah(ibah); local
[all...]

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