Searched defs:bank (Results 1 - 25 of 117) sorted by relevance

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/drivers/media/dvb-frontends/
H A Dcxd2820r_priv.h44 u8 bank[2]; member in struct:cxd2820r_priv
/drivers/clk/rockchip/
H A Dsoftrst.c37 int bank = id / softrst->num_per_reg; local
42 softrst->reg_base + (bank * 4));
49 reg = readl(softrst->reg_base + (bank * 4));
50 writel(reg | BIT(offset), softrst->reg_base + (bank * 4));
64 int bank = id / softrst->num_per_reg; local
68 writel((BIT(offset) << 16), softrst->reg_base + (bank * 4));
75 reg = readl(softrst->reg_base + (bank * 4));
76 writel(reg & ~BIT(offset), softrst->reg_base + (bank * 4));
/drivers/hwspinlock/
H A Dhwspinlock_internal.h44 * @bank: the hwspinlock_device structure which owns this lock
49 struct hwspinlock_device *bank; member in struct:hwspinlock
72 int local_id = hwlock - &hwlock->bank->lock[0];
74 return hwlock->bank->base_id + local_id;
H A Dhwspinlock_core.c120 ret = hwlock->bank->ops->trylock(hwlock);
202 if (hwlock->bank->ops->relax)
203 hwlock->bank->ops->relax(hwlock);
248 hwlock->bank->ops->unlock(hwlock);
312 * @bank: the hwspinlock device, which usually provides numerous hw locks
315 * @base_id: id of the first hardware spinlock in this bank
325 int hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev, argument
331 if (!bank || !ops || !dev || !num_locks || !ops->trylock ||
337 bank->dev = dev;
338 bank
373 hwspin_lock_unregister(struct hwspinlock_device *bank) argument
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H A Domap_hwspinlock.c84 struct hwspinlock_device *bank; local
132 bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
133 if (!bank) {
138 platform_set_drvdata(pdev, bank);
140 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
143 ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
151 kfree(bank);
160 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local
161 void __iomem *io_base = bank
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H A Du8500_hsem.c97 struct hwspinlock_device *bank; local
122 bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
123 if (!bank) {
128 platform_set_drvdata(pdev, bank);
130 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
136 ret = hwspin_lock_register(bank, &pdev->dev, &u8500_hwspinlock_ops,
145 kfree(bank);
153 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local
154 void __iomem *io_base = bank
[all...]
/drivers/cpufreq/
H A Ds3c24xx-cpufreq-debugfs.c125 int bank; local
135 seq_printf(seq, "no code to show bank timing\n");
147 for (bank = 0; bank < MAX_BANKS; bank++) {
148 iob = &iot->bank[bank];
150 seq_printf(seq, "bank %d: ", bank);
/drivers/gpio/
H A Dgpio-74x164.c72 u8 bank = offset / 8; local
77 ret = (chip->buffer[bank] >> pin) & 0x1;
87 u8 bank = offset / 8; local
92 chip->buffer[bank] |= (1 << pin);
94 chip->buffer[bank] &= ~(1 << pin);
H A Dgpio-xgene.c140 unsigned int bank; local
142 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
143 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
144 gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);
153 unsigned int bank; local
155 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank
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H A Dgpio-adp5588.c70 unsigned bank = ADP5588_BANK(off); local
76 if (dev->dir[bank] & bit)
77 val = dev->dat_out[bank];
79 val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
89 unsigned bank, bit; local
93 bank = ADP5588_BANK(off);
98 dev->dat_out[bank] |= bit;
100 dev->dat_out[bank] &= ~bit;
102 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
103 dev->dat_out[bank]);
110 unsigned bank; local
128 unsigned bank, bit; local
210 unsigned bank, bit; local
257 unsigned status, bank, bit, pending; local
[all...]
H A Dgpio-ep93xx.c322 void __iomem *mmio_base, struct ep93xx_gpio_bank *bank)
324 void __iomem *data = mmio_base + bank->data;
325 void __iomem *dir = mmio_base + bank->dir;
332 bgc->gc.label = bank->label;
333 bgc->gc.base = bank->base;
335 if (bank->has_debounce) {
361 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; local
364 ep93xx_gpio->mmio_base, bank))
365 dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
366 bank
321 ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev, void __iomem *mmio_base, struct ep93xx_gpio_bank *bank) argument
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/drivers/mfd/
H A Dabx500-core.c64 int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg, argument
71 return ops->set_register(dev, bank, reg, value);
77 int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg, argument
84 return ops->get_register(dev, bank, reg, value);
90 int abx500_get_register_page_interruptible(struct device *dev, u8 bank, argument
97 return ops->get_register_page(dev, bank,
104 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank, argument
111 return ops->mask_and_set_register(dev, bank,
H A Dab8500-sysctrl.c145 static inline bool valid_bank(u8 bank) argument
147 return ((bank == AB8500_SYS_CTRL1_BLOCK) ||
148 (bank == AB8500_SYS_CTRL2_BLOCK));
153 u8 bank; local
158 bank = (reg >> 8);
159 if (!valid_bank(bank))
162 return abx500_get_register_interruptible(sysctrl_dev, bank,
169 u8 bank; local
174 bank = (reg >> 8);
175 if (!valid_bank(bank))
[all...]
/drivers/reset/
H A Dreset-socfpga.c41 int bank = id / BITS_PER_LONG; local
48 reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
50 (bank * NR_BANKS));
63 int bank = id / BITS_PER_LONG; local
70 reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS));
72 (bank * NR_BANKS));
H A Dreset-sunxi.c37 int bank = id / BITS_PER_LONG; local
44 reg = readl(data->membase + (bank * 4));
45 writel(reg & ~BIT(offset), data->membase + (bank * 4));
58 int bank = id / BITS_PER_LONG; local
65 reg = readl(data->membase + (bank * 4));
66 writel(reg | BIT(offset), data->membase + (bank * 4));
/drivers/clk/tegra/
H A Dclk-periph.c149 struct tegra_clk_periph_regs *bank; local
165 bank = get_reg_bank(periph->gate.clk_num);
166 if (!bank)
175 periph->gate.regs = bank;
/drivers/crypto/qat/qat_common/
H A Dadf_transport_debug.c88 struct adf_etr_bank_data *bank = ring->bank; local
90 void __iomem *csr = ring->bank->csr_addr;
96 head = READ_CSR_RING_HEAD(csr, bank->bank_number,
98 tail = READ_CSR_RING_TAIL(csr, bank->bank_number,
100 empty = READ_CSR_E_STAT(csr, bank->bank_number);
103 seq_printf(sfile, "ring num %d, bank num %d\n",
104 ring->ring_number, ring->bank->bank_number);
174 ring->bank->bank_debug_dir,
216 struct adf_etr_bank_data *bank local
276 adf_bank_debugfs_add(struct adf_etr_bank_data *bank) argument
300 adf_bank_debugfs_rm(struct adf_etr_bank_data *bank) argument
[all...]
H A Dadf_transport_internal.h65 struct adf_etr_bank_data *bank; member in struct:adf_etr_ring_data
84 spinlock_t lock; /* protects bank data struct */
98 int adf_bank_debugfs_add(struct adf_etr_bank_data *bank);
99 void adf_bank_debugfs_rm(struct adf_etr_bank_data *bank);
103 static inline int adf_bank_debugfs_add(struct adf_etr_bank_data *bank) argument
108 #define adf_bank_debugfs_rm(bank) do {} while (0)
H A Dqat_crypto.c151 unsigned long bank; local
181 if (kstrtoul(val, 10, &bank))
200 if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym,
205 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym,
211 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym,
217 if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym,
223 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym,
229 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym,
/drivers/crypto/qat/qat_dh895xcc/
H A Dadf_isr.c89 struct adf_etr_bank_data *bank = bank_ptr; local
91 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, 0);
92 tasklet_hi_schedule(&bank->resp_handler);
115 struct adf_etr_bank_data *bank = &etr_data->banks[i]; local
122 adf_msix_isr_bundle, 0, name, bank);
/drivers/dma/ipu/
H A Dipu_irq.c75 struct ipu_irq_bank *bank; member in struct:ipu_irq_map
99 struct ipu_irq_bank *bank; local
105 bank = map->bank;
106 if (!bank) {
112 reg = ipu_read_reg(bank->ipu, bank->control);
114 ipu_write_reg(bank->ipu, reg, bank->control);
122 struct ipu_irq_bank *bank; local
145 struct ipu_irq_bank *bank; local
170 struct ipu_irq_bank *bank; local
276 struct ipu_irq_bank *bank = irq_bank + i; local
317 struct ipu_irq_bank *bank = irq_bank + i; local
[all...]
/drivers/edac/
H A Docteon_edac-lmc.c34 unsigned long bank; member in struct:octeon_lmc_pvt
50 "DIMM %d rank %d bank %d row %d col %d",
95 fadr.cn61xx.fbank = pvt->bank;
100 "DIMM %d rank %d bank %d row %d col %d",
158 TEMPLATE_SHOW(bank); variable
159 TEMPLATE_STORE(bank); variable
205 static DEVICE_ATTR(bank, S_IRUGO | S_IWUSR,
H A Dghes_edac.c320 p += sprintf(p, "bank:%d ", mem_err->bank);
328 const char *bank = NULL, *device = NULL; local
329 dmi_memdev_name(mem_err->mem_dev_handle, &bank, &device);
330 if (bank != NULL && device != NULL)
331 p += sprintf(p, "DIMM location:%s %s ", bank, device);
501 * DMI bank location fields on different ways
/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.h83 * @bank: bank responsible for this interrupt
87 struct samsung_pin_bank *bank; member in struct:exynos_weint_data
/drivers/firmware/efi/
H A Dcper.c228 n += scnprintf(msg + n, len - n, "bank: %d ", mem->bank);
255 const char *bank = NULL, *device = NULL; local
262 dmi_memdev_name(mem->mem_dev_handle, &bank, &device);
263 if (bank && device)
264 n = snprintf(msg, len, "DIMM location: %s %s ", bank, device);
281 cmem->bank = mem->bank;

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