Searched defs:base (Results 1 - 25 of 399) sorted by relevance

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/arch/arm/mach-omap2/
H A Domap-hotplug.c33 void __iomem *base = omap_get_wakeupgen_base(); local
42 writel_relaxed(0, base + OMAP_AUX_CORE_BOOT_0);
56 readl_relaxed(base + OMAP_AUX_CORE_BOOT_0) >> 5;
/arch/c6x/kernel/
H A Ddevicetree.c15 void __init early_init_dt_add_memory_arch(u64 base, u64 size) argument
17 c6x_add_memory(base, size);
/arch/arm/include/asm/hardware/
H A Dtimer-sp.h8 static inline void sp804_clocksource_init(void __iomem *base, const char *name) argument
10 __sp804_clocksource_and_sched_clock_init(base, name, NULL, 0);
13 static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base, argument
16 __sp804_clocksource_and_sched_clock_init(base, name, NULL, 1);
19 static inline void sp804_clockevents_init(void __iomem *base, unsigned int irq, const char *name) argument
21 __sp804_clockevents_init(base, irq, NULL, name);
/arch/arm/mach-ebsa110/include/mach/
H A Duncompress.h20 unsigned char v, *base = SERIAL_BASE; local
23 v = base[UART_LSR << 2];
27 base[UART_TX << 2] = c;
32 unsigned char v, *base = SERIAL_BASE; local
35 v = base[UART_LSR << 2];
/arch/arm/mach-spear/include/mach/
H A Duncompress.h25 void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE; local
27 while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF)
30 writel_relaxed(c, base + UART01x_DR);
/arch/mips/include/asm/
H A Dsetup.h9 extern void setup_8250_early_printk_port(unsigned long base,
12 static inline void setup_8250_early_printk_port(unsigned long base, argument
/arch/mips/kernel/
H A Dirq-rm7000.c41 int base = RM7K_CPU_IRQ_BASE; local
46 for (i = base; i < base + 4; i++)
/arch/mips/sgi-ip32/
H A Dip32-memory.c24 u64 base, size; local
31 base = (bankctl & CRIME_MEM_BANK_CONTROL_ADDR) << 25;
32 if (bank != 0 && base == 0)
36 if (base + size > (256 << 20))
37 base += CRIME_HI_MEM_BASE;
39 printk("CRIME MC: bank %u base 0x%016Lx size %LuMiB\n",
40 bank, base, size >> 20);
41 add_memory_region(base, size, BOOT_MEM_RAM);
/arch/mn10300/proc-mn103e010/
H A Dproc-init.c81 * determine the memory size and base from the memory controller regs
85 unsigned long base, size; local
90 base = SDBASE(0);
91 if (base & SDBASE_CE) {
92 size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT;
94 base &= SDBASE_CBA;
96 printk(KERN_INFO "SDRAM[0]: %luMb @%08lx\n", size >> 20, base);
98 *mem_base = base;
101 base = SDBASE(1);
102 if (base
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/arch/powerpc/boot/
H A Dstdlib.c15 /* Not currently supported: leading whitespace, sign, 0x prefix, zero base */
16 unsigned long long int strtoull(const char *ptr, char **end, int base) argument
20 if (base > 36)
26 if (*ptr >= '0' && *ptr <= '9' && *ptr < '0' + base)
28 else if (*ptr >= 'A' && *ptr < 'A' + base - 10)
30 else if (*ptr >= 'a' && *ptr < 'a' + base - 10)
35 ret *= base;
/arch/arm/include/asm/
H A Dvfpmacros.h20 .macro VFPFLDMIA, base, tmp variable
22 LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} variable
24 LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
31 ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} variable
32 addeq \base, \base, #32*4 @ step over unused register space variable
37 ldceql p11, cr0, [\base],#3
44 .macro VFPFSTMIA, base, tmp variable
46 STC p11, cr0, [\\base],#33*4 @ FSTMIAX \\base!, {d0-d15} variable
55 stcnel p11, cr0, [\\base],#32*4 @ FSTMIAD \\base!, {d16-d31} variable
56 addeq \\base, \\base, #32*4 @ step over unused register space variable
[all...]
/arch/arm/mach-at91/
H A Dsysirq_mask.c34 void __iomem *base; local
36 base = ioremap(rtc_base, 64);
37 if (!base)
48 writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
49 (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
51 iounmap(base);
56 void __iomem *base; local
60 base = ioremap(rtt_base, 16);
61 if (!base)
64 reg = base
[all...]
/arch/arm/mach-mv78xx0/include/mach/
H A Duncompress.h16 unsigned char *base = SERIAL_BASE; local
20 if (base[UART_LSR << 2] & UART_LSR_THRE)
25 base[UART_TX << 2] = c;
30 unsigned char *base = SERIAL_BASE; local
37 if ((base[UART_LSR << 2] & mask) == mask)
/arch/arm/mach-nspire/
H A Dnspire.c68 void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); local
69 if (!base)
72 writel(2, base + NSPIRE_MISC_HWRESET);
/arch/arm/mach-orion5x/include/mach/
H A Duncompress.h18 unsigned char *base = SERIAL_BASE; local
22 if (base[UART_LSR << 2] & UART_LSR_THRE)
27 base[UART_TX << 2] = c;
32 unsigned char *base = SERIAL_BASE; local
39 if ((base[UART_LSR << 2] & mask) == mask)
/arch/arm/mach-realview/include/mach/
H A Duncompress.h29 #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
30 #define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
31 #define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
32 #define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
35 * Return the UART base address
58 unsigned long base local
68 unsigned long base = get_uart_base(); local
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/arch/ia64/lib/
H A Dstrlen.S72 #define base r16 define
108 add base=-16,src // keep track of aligned base
143 sub ret0=src,orig // distance from base
169 ld8 val=[base],8 // will fail if unrecoverable fault
178 (p6) ld8 val=[base],8 // will fail if unrecoverable fault
185 sub ret0=base,orig // distance from base
H A Dstrlen_user.S74 #define base r16 define
110 add base=-16,src // keep track of aligned base
166 EX(.Lexit1, ld8 val=[base],8) // load the initial bytes
175 EX(.Lexit1, (p6) ld8 val=[base],8)
182 sub ret0=base,orig // distance from base
/arch/metag/include/asm/
H A Dhwthread.h28 unsigned int base, thread_offset, thread_regnum; local
32 base = T0UCTREG0; /* Control unit base */
37 return (void __iomem *)(base + thread_offset + thread_regnum);
/arch/mips/include/asm/mach-au1x00/
H A Dgpio.h23 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); local
24 __raw_writel(0, base + 0x110); /* the write op is key */
/arch/mips/lib/
H A Diomap-pci.c17 unsigned long base = ctrl->io_map_base; local
27 ctrl->io_map_base = base = mips_io_port_base;
/arch/mips/loongson/common/
H A Dearly_printk.c16 #define PORT(base, offset) (u8 *)(base + offset)
18 static inline unsigned int serial_in(unsigned char *base, int offset) argument
20 return readb(PORT(base, offset));
23 static inline void serial_out(unsigned char *base, int offset, int value) argument
25 writeb(value, PORT(base, offset));
/arch/s390/lib/
H A Ddiv64.c17 static uint32_t __div64_31(uint64_t *n, uint32_t base) argument
24 /* Special case base==1, remainder = 0, quotient = n */
25 if (base == 1)
28 * Special case base==0 will cause a fixed point divide exception
30 * following calculation we can assume base > 1. The first
38 : "+d" (reg2), "+d" (reg3) : "d" (base) : "cc" );
48 * is increased by one then checked against the base. If the
49 * remainder has overflown subtract base and increase the
65 : "d" (base), "2" (1UL) : "cc" );
74 uint32_t __div64_32(uint64_t *n, uint32_t base) argument
127 __div64_32(uint64_t *n, uint32_t base) argument
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/arch/sh/boards/mach-sdk7786/
H A Dfpga.c30 void __iomem *base; local
38 base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE);
39 if (!base) {
44 if (ioread16(base + SRSTR) == SRSTR_MAGIC)
45 return base; /* Found it! */
47 iounmap(base);
/arch/sh/include/asm/
H A Dheartbeat.h9 void __iomem *base; member in struct:heartbeat_data

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