Searched defs:clr_mask (Results 1 - 9 of 9) sorted by relevance

/drivers/media/i2c/
H A Dths8200.c108 uint8_t clr_mask, uint8_t val_mask)
110 ths8200_write(sd, reg, (ths8200_read(sd, reg) & clr_mask) | val_mask);
107 ths8200_write_and_or(struct v4l2_subdev *sd, u8 reg, uint8_t clr_mask, uint8_t val_mask) argument
H A Dad9389b.c148 u8 clr_mask, u8 val_mask)
150 ad9389b_wr(sd, reg, (ad9389b_rd(sd, reg) & clr_mask) | val_mask);
147 ad9389b_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) argument
H A Dadv7511.c198 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, uint8_t clr_mask, uint8_t val_mask) argument
200 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
/drivers/mfd/
H A Dssbi.c104 static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) argument
111 if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0))
/drivers/net/phy/
H A Dbcm7xxx.c243 int set_mask, int clr_mask)
251 v &= ~clr_mask;
242 phy_set_clr_bits(struct phy_device *dev, int location, int set_mask, int clr_mask) argument
/drivers/hwmon/
H A Dlm75.c189 u8 set_mask, clr_mask; local
209 clr_mask = LM75_SHUTDOWN; /* continuous conversions */
213 clr_mask |= 1 << 5; /* not one-shot mode */
220 clr_mask |= 3 << 5;
257 clr_mask |= 1 << 7; /* not one-shot mode */
261 clr_mask |= 1 << 7; /* not one-shot mode */
270 clr_mask |= 1 << 7; /* not one-shot mode */
283 new = status & ~clr_mask;
/drivers/dma/
H A Dqcom_bam_dma.c688 u32 clr_mask = 0, srcs = 0; local
697 clr_mask = readl_relaxed(bdev->regs + BAM_IRQ_STTS);
702 writel_relaxed(clr_mask, bdev->regs + BAM_IRQ_CLR);
/drivers/infiniband/hw/mthca/
H A Dmthca_dev.h229 u32 clr_mask; member in struct:mthca_eq_table
/drivers/net/ethernet/mellanox/mlx4/
H A Dmlx4.h656 u32 clr_mask; member in struct:mlx4_eq_table

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