/drivers/pcmcia/ |
H A D | vrc4171_card.c | 322 uint8_t voltage, power, control, cscint; local 344 control = 0; 346 control |= socket->io_irq; 348 control |= I365_PC_IOCARD; 350 control &= ~I365_PC_RESET; 352 control |= I365_PC_RESET; 353 exca_write_byte(slot, I365_INTCTL, control);
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/drivers/ptp/ |
H A D | ptp_pch.c | 55 u32 control; member in struct:pch_ts_regs 188 val = ioread32(&chip->regs->control) | PCH_TSC_RESET; 189 iowrite32(val, (&chip->regs->control)); 191 iowrite32(val, (&chip->regs->control));
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/drivers/scsi/megaraid/ |
H A D | megaraid_sas_fusion.c | 1347 u8 opcode = 0, flagvals = 0, groupnum = 0, control = 0; local 1408 control = cdb[15]; 1413 control = cdb[11]; 1421 cdb[9] = control; 1434 control = cdb[5]; 1441 control = cdb[9]; 1448 control = cdb[11]; 1457 cdb[15] = control;
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/drivers/soc/ti/ |
H A D | knav_dma.c | 74 u32 control; member in struct:reg_chan 84 u32 control; member in struct:reg_rx_flow 157 writel_relaxed(DMA_ENABLE, &chan->reg_chan->control); 179 writel_relaxed(v, &chan->reg_rx_flow->control); 211 writel_relaxed(DMA_TEARDOWN, &chan->reg_chan->control); 216 value = readl_relaxed(&chan->reg_chan->control); 221 if (readl_relaxed(&chan->reg_chan->control) & DMA_ENABLE) { 246 writel_relaxed(0, &chan->reg_rx_flow->control); 263 writel_relaxed(DMA_ENABLE, &dma->reg_tx_chan[i].control); 288 writel_relaxed(DMA_ENABLE, &dma->reg_rx_chan[i].control); [all...] |
/drivers/spi/ |
H A D | spi-adi-v3.c | 89 u32 control; member in struct:adi_spi_master 99 u32 control; member in struct:adi_spi_device 115 ctl = ioread32(&drv_data->regs->control); 117 iowrite32(ctl, &drv_data->regs->control); 124 ctl = ioread32(&drv_data->regs->control); 126 iowrite32(ctl, &drv_data->regs->control); 217 iowrite32(chip->control, &drv_data->regs->control); 430 cr = ioread32(&drv->regs->control) & ~SPI_CTL_SIZE; 432 iowrite32(cr, &drv->regs->control); [all...] |
H A D | spi-ep93xx.c | 232 static void ep93xx_spi_cs_control(struct spi_device *spi, bool control) argument 235 int value = (spi->mode & SPI_CS_HIGH) ? control : !control;
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/drivers/staging/media/lirc/ |
H A D | lirc_sir.c | 604 /* -RTS low -> send control byte */ 618 /* read previous control byte */ 712 #define ACT200L_ECHO 0x08 /* Echo control chars */ 771 __u8 control[] = { local 815 /* send out the control register settings for 115K 7N1 SIR operation */ 816 for (i = 0; i < sizeof(control); i++) { 817 soutp(UART_TX, control[i]);
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/drivers/staging/ozwpan/ |
H A D | ozprotocol.h | 46 u8 control; member in struct:oz_hdr 52 /* Bits in the control field. */
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/drivers/tty/ |
H A D | amiserial.c | 108 int MCR; /* Modem control register */ 727 /* CTS flow control flag and modem status interrupts */ 1148 unsigned char control, status; local 1156 control = info->MCR; 1160 return ((control & SER_RTS) ? TIOCM_RTS : 0) 1161 | ((control & SER_DTR) ? TIOCM_DTR : 0) 1470 * control, which is currently the case. Hence, if it ever 1552 char stat_buf[30], control, status; local 1559 control = (state->tport.flags & ASYNC_INITIALIZED) ? state->MCR : status; 1564 if(!(control [all...] |
/drivers/tty/serial/ |
H A D | zs.c | 143 void __iomem *control = zport->port.membase + ZS_CHAN_IO_OFFSET; local 147 writeb(reg & 0xf, control); 151 retval = readb(control); 158 void __iomem *control = zport->port.membase + ZS_CHAN_IO_OFFSET; local 161 writeb(reg & 0xf, control); 164 writeb(value, control);
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/drivers/usb/class/ |
H A D | cdc-acm.c | 122 * Functions for ACM control messages. 130 retval = usb_autopm_get_interface(acm->control); 136 acm->control->altsetting[0].desc.bInterfaceNumber, 139 dev_dbg(&acm->control->dev, 143 usb_autopm_put_interface(acm->control); 151 static inline int acm_set_control(struct acm *acm, int control) argument 157 control, NULL, 0); 209 usb_autopm_put_interface_async(acm->control); 278 /* control interface reports status changes with "interrupt" transfers */ 297 dev_dbg(&acm->control [all...] |
/drivers/usb/gadget/udc/ |
H A D | atmel_usba_udc.c | 1582 u32 status, control, pending; local 1585 control = usba_dma_readl(ep, CONTROL); 1589 pending = status & control; 1590 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); 1596 "status=%#08x, pending=%#08x, control=%#08x\n", 1597 status, pending, control);
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H A D | gr_udc.h | 44 u32 control; /* 0x200 */ member in struct:gr_regs
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/drivers/usb/host/ |
H A D | pci-quirks.c | 57 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */ 573 u32 control; local 584 control = readl(base + OHCI_CONTROL); 592 if (control & OHCI_CTRL_IR) { 612 if (control & OHCI_HCFS) { 614 writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL); 952 * It signals to the BIOS that the OS wants control of the host controller, 953 * and then waits 5 seconds for the BIOS to hand over control. 954 * If we timeout, assume the BIOS is broken and take control anyway.
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/drivers/usb/serial/ |
H A D | spcp8x5.c | 199 dev_err(&port->dev, "failed to set control lines: %d\n", 266 u8 control; local 275 control = priv->line_control; 277 spcp8x5_set_ctrl_line(port, control); 299 u8 control; local 307 control = priv->line_control; 313 if (control != priv->line_control) { 314 control = priv->line_control; 316 spcp8x5_set_ctrl_line(port, control); 387 /* enable hardware flow control */ 421 u8 control; local [all...] |
/drivers/video/fbdev/ |
H A D | acornfb.h | 76 u_int control; member in struct:vidc_timing
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/drivers/video/fbdev/matrox/ |
H A D | matroxfb_maven.c | 61 size_t control; member in struct:mctl 110 -ENOENT: id not found, create fake disabled control */ 135 return (int*)((char*)(md->primary_head) + maven_controls[idx].control);
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/drivers/video/fbdev/nvidia/ |
H A D | nv_type.h | 88 u32 control; member in struct:_riva_hw_state
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/drivers/ata/ |
H A D | ata_piix.c | 65 * PIIX4 errata #15 - Must not read control registers 104 ICH5_PCS = 0x92, /* port control and status */ 576 int control = 0; local 591 control |= 1; /* TIME1 enable */ 593 control |= 2; /* IE enable */ 596 control |= 4; /* PPE enable */ 603 control |= 8; /* PIO cycles in PIO0 */ 616 master_data |= (control << 4); 626 master_data |= control; 1648 * and then hand over control t [all...] |
/drivers/block/mtip32xx/ |
H A D | mtip32xx.h | 257 unsigned char control; member in struct:host_to_dev_fis 445 /* Semaphore to control queue depth of unaligned IOs */
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/drivers/block/ |
H A D | skd_s1120.h | 200 uint32_t control; member in struct:fit_sg_descriptor
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/drivers/dma/ |
H A D | ep93xx_dma.c | 149 * @runtime_ctrl: M2M runtime values for the control register. 307 static void m2p_set_control(struct ep93xx_dma_chan *edmac, u32 control) argument 309 writel(control, edmac->regs + M2P_CONTROL); 312 * write to the control register. 320 u32 control; local 324 control = M2P_CONTROL_CH_ERROR_INT | M2P_CONTROL_ICE 326 m2p_set_control(edmac, control); 338 u32 control; local 340 control = readl(edmac->regs + M2P_CONTROL); 341 control 382 u32 control = readl(edmac->regs + M2P_CONTROL); local 398 u32 control; local 450 u32 control = 0; local 540 u32 control = readl(edmac->regs + M2M_CONTROL); local 592 u32 control; local [all...] |
/drivers/firewire/ |
H A D | core-cdev.c | 1052 /* Macros for decoding the iso packet control header. */ 1066 u32 control; local 1103 if (get_user(control, &p->control)) 1105 u.packet.payload_length = GET_PAYLOAD_LENGTH(control); 1106 u.packet.interrupt = GET_INTERRUPT(control); 1107 u.packet.skip = GET_SKIP(control); 1108 u.packet.tag = GET_TAG(control); 1109 u.packet.sy = GET_SY(control); 1110 u.packet.header_length = GET_HEADER_LENGTH(control); [all...] |
/drivers/infiniband/hw/ipath/ |
H A D | ipath_verbs.c | 1106 u32 control; local 1134 control = qp->s_pkt_delay; 1149 control |= 1ULL << 31; 1165 tx->hdr.pbc[1] = cpu_to_le32(control); 1194 *piobuf++ = (__force u32) cpu_to_le32(control); 1231 u32 control; local 1246 control = qp->s_pkt_delay; 1251 control |= 1ULL << 31; 1254 * Write the length to the control qword plus any needed flags. 1258 writeq(((u64) control << 3 [all...] |
/drivers/infiniband/hw/qib/ |
H A D | qib_verbs.c | 1144 u32 control; local 1160 control = dd->f_setpbc_control(ppd, plen, qp->s_srate, 1189 phdr->pbc[1] = cpu_to_le32(control); 1206 phdr->pbc[1] = cpu_to_le32(control); 1281 u32 control; local 1284 control = dd->f_setpbc_control(ppd, plen, qp->s_srate, 1286 pbc = ((u64) control << 32) | plen; 1386 * The +1 counts for the pbc control dword following the pbc length.
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