Searched defs:disable (Results 1 - 25 of 78) sorted by relevance

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/drivers/gpu/drm/nouveau/core/subdev/devinit/
H A Dgm107.c33 u64 disable = 0ULL; local
36 disable |= (1ULL << NVDEV_ENGINE_COPY0);
38 disable |= (1ULL << NVDEV_ENGINE_COPY2);
40 disable |= (1ULL << NVDEV_ENGINE_DISP);
42 return disable;
55 .disable = gm107_devinit_disable,
H A Dnv84.c33 u64 disable = 0ULL; local
36 disable |= (1ULL << NVDEV_ENGINE_MPEG);
37 disable |= (1ULL << NVDEV_ENGINE_VP);
38 disable |= (1ULL << NVDEV_ENGINE_BSP);
39 disable |= (1ULL << NVDEV_ENGINE_CRYPT);
43 disable |= (1ULL << NVDEV_ENGINE_DISP);
45 disable |= (1ULL << NVDEV_ENGINE_BSP);
47 disable |= (1ULL << NVDEV_ENGINE_CRYPT);
49 return disable;
62 .disable
[all...]
H A Dnv98.c33 u64 disable = 0ULL; local
36 disable |= (1ULL << NVDEV_ENGINE_VP);
37 disable |= (1ULL << NVDEV_ENGINE_BSP);
38 disable |= (1ULL << NVDEV_ENGINE_PPP);
42 disable |= (1ULL << NVDEV_ENGINE_DISP);
44 disable |= (1ULL << NVDEV_ENGINE_BSP);
46 disable |= (1ULL << NVDEV_ENGINE_CRYPT);
48 return disable;
61 .disable = nv98_devinit_disable,
H A Dnvaf.c33 u64 disable = 0; local
36 disable |= (1ULL << NVDEV_ENGINE_VP);
37 disable |= (1ULL << NVDEV_ENGINE_PPP);
41 disable |= (1ULL << NVDEV_ENGINE_DISP);
43 disable |= (1ULL << NVDEV_ENGINE_BSP);
45 disable |= (1ULL << NVDEV_ENGINE_VIC);
47 disable |= (1ULL << NVDEV_ENGINE_COPY0);
49 return disable;
62 .disable = nvaf_devinit_disable,
H A Dpriv.h13 u64 (*disable)(struct nouveau_devinit *); member in struct:nouveau_devinit_impl
H A Dnva3.c67 u64 disable = 0ULL; local
70 disable |= (1ULL << NVDEV_ENGINE_VP);
71 disable |= (1ULL << NVDEV_ENGINE_PPP);
75 disable |= (1ULL << NVDEV_ENGINE_DISP);
77 disable |= (1ULL << NVDEV_ENGINE_BSP);
79 disable |= (1ULL << NVDEV_ENGINE_COPY0);
81 return disable;
143 .disable = nva3_devinit_disable,
H A Dnvc0.c67 u64 disable = 0ULL; local
70 disable |= (1ULL << NVDEV_ENGINE_DISP);
73 disable |= (1ULL << NVDEV_ENGINE_VP);
74 disable |= (1ULL << NVDEV_ENGINE_PPP);
78 disable |= (1ULL << NVDEV_ENGINE_BSP);
80 disable |= (1ULL << NVDEV_ENGINE_VENC);
82 disable |= (1ULL << NVDEV_ENGINE_COPY0);
84 disable |= (1ULL << NVDEV_ENGINE_COPY1);
86 return disable;
117 .disable
[all...]
H A Dnv50.c82 u64 disable = 0ULL; local
85 disable |= (1ULL << NVDEV_ENGINE_MPEG);
87 return disable;
162 .disable = nv50_devinit_disable,
/drivers/iommu/
H A Dirq_remapping.h51 void (*disable)(void); member in struct:irq_remap_ops
H A Domap-iommu.h75 void (*disable)(struct omap_iommu *obj); member in struct:iommu_functions
/drivers/net/phy/
H A Dnational.c111 static void ns_10_base_t_hdx_loopack(struct phy_device *phydev, int disable) argument
113 if (disable)
/drivers/pci/
H A Dsetup-res.c32 bool disable; local
76 * disable decoding so that a half-updated BAR won't conflict
79 disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;
80 if (disable) {
104 if (disable)
/drivers/gpu/drm/i915/
H A Dintel_dsi.h52 void (*disable)(struct intel_dsi_device *dsi); member in struct:intel_dsi_dev_ops
/drivers/gpu/drm/sti/
H A Dsti_layer.h54 * @disable: disable layer
62 int (*disable)(struct sti_layer *layer); member in struct:sti_layer_funcs
/drivers/irqchip/
H A Dirq-bcm2835.c35 * their respective banks' enable/disable registers. Doing so in the bank 0
36 * enable/disable registers has no effect.
93 void __iomem *disable[NR_BANKS]; member in struct:armctrl_ic
103 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]);
161 intc.disable[b] = base + reg_disable[b];
/drivers/media/i2c/
H A Dths7303.c93 int err, disable = 0; local
112 /* disable all channels */
113 disable = 1;
117 if (!disable)
124 if (!disable)
131 if (!disable)
183 /* disable all channels */
/drivers/scsi/csiostor/
H A Dcsio_attr.c543 csio_vport_create(struct fc_vport *fc_vport, bool disable) argument
638 csio_vport_disable(struct fc_vport *fc_vport, bool disable) argument
644 /* disable vport */
645 if (disable) {
/drivers/scsi/lpfc/
H A Dlpfc_vport.c291 lpfc_vport_create(struct fc_vport *fc_vport, bool disable) argument
430 if (disable) {
557 lpfc_vport_disable(struct fc_vport *fc_vport, bool disable) argument
559 if (disable)
/drivers/watchdog/
H A Dar7_wdt.c66 u32 disable; member in struct:ar7_wdt
132 WRITE_REG(ar7_wdt->disable, value);
137 pr_err("failed to unlock WDT disable reg\n");
184 pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
/drivers/gpu/drm/nouveau/core/engine/device/
H A Dbase.c287 u64 disable, mmio_base, mmio_size; local
294 "disable %016llx debug0 %016llx\n",
296 args->v0.disable, args->v0.debug0);
325 /* translate api disable mask into internal mapping */
326 disable = args->v0.debug0;
328 if (args->v0.disable & disable_map[i])
329 disable |= (1ULL << i);
333 if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY) &&
432 if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) &&
443 if (!(oclass = device->oclass[i]) || (disable
[all...]
/drivers/net/ethernet/chelsio/cxgb/
H A Dgmac.h105 int (*disable)(struct cmac *, int); member in struct:cmac_ops
/drivers/scsi/bfa/
H A Dbfad_attr.c357 bfad_im_vport_create(struct fc_vport *fc_vport, bool disable) argument
401 if (disable) {
541 bfad_im_vport_disable(struct fc_vport *fc_vport, bool disable) argument
562 if (disable) {
/drivers/gpu/drm/panel/
H A Dpanel-simple.c53 * @disable: the time (in milliseconds) that it takes for the panel to
61 unsigned int disable; member in struct:panel_desc::__anon951
130 if (p->desc->delay.disable)
131 msleep(p->desc->delay.disable);
225 .disable = panel_simple_disable,
/drivers/gpu/drm/radeon/
H A Drs600.c315 /* disable any active CRTCs */
425 unsigned disable = 0; local
441 disable |= 1 << radeon_connector->hpd.hpd;
443 radeon_irq_kms_disable_hpd(rdev, disable);
468 /* disable bus mastering */
582 /* disable all other contexts */
614 /* FIXME: disable out of gart access */
/drivers/gpu/drm/tegra/
H A Ddrm.h178 int (*disable)(struct tegra_output *output); member in struct:tegra_output_ops
231 if (output && output->ops && output->ops->disable)
232 return output->ops->disable(output);

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