/arch/x86/include/asm/ |
H A D | suspend_32.h | 14 u16 es, fs, gs, ss; member in struct:saved_context
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H A D | vm86.h | 28 unsigned short gs, __gsh; member in struct:kernel_vm86_regs
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H A D | sigcontext.h | 8 unsigned short gs, __gsh; member in struct:sigcontext 60 unsigned short gs; member in struct:sigcontext
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H A D | suspend_64.h | 22 u16 ds, es, fs, gs, ss; member in struct:saved_context
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H A D | lguest.h | 38 unsigned long gs; member in struct:lguest_regs
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H A D | ptrace.h | 22 unsigned long gs; member in struct:pt_regs
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H A D | user32.h | 38 unsigned short fs, __fs, gs, __gs; member in struct:user_regs_struct32
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H A D | user_32.h | 88 unsigned long gs; member in struct:user_regs_struct
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H A D | user_64.h | 95 unsigned long gs; member in struct:user_regs_struct
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H A D | paravirt.h | 280 static inline void load_gs_index(unsigned int gs) argument 282 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
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H A D | svm.h | 144 struct vmcb_seg gs; member in struct:vmcb_save_area
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H A D | processor.h | 233 unsigned short gs, __gsh; member in struct:x86_hw_tss 421 * GCC hardcodes the stack canary as %gs:40. Since the 422 * irq_stack is the object at %gs:0, we reserve the bottom 446 char __pad[20]; /* canary at %gs:20 */ 488 unsigned long gs; member in struct:thread_struct
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/arch/arm/mach-s3c24xx/ |
H A D | common.c | 168 u32 gs = __raw_readl(S3C24XX_GSTATUS1); local 171 if ((gs >> 16) == 0x3245) 172 return gs;
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/arch/x86/ia32/ |
H A D | ia32_aout.c | 55 u32 fs, gs; local 91 savesegment(gs, gs); 92 dump->regs.gs = gs;
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/arch/x86/include/asm/xen/ |
H A D | interface_32.h | 68 uint16_t gs, _pad5; member in struct:cpu_user_regs
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H A D | interface_64.h | 52 #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */ 126 uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */ member in struct:cpu_user_regs
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/arch/x86/include/uapi/asm/ |
H A D | sigcontext32.h | 53 unsigned short gs, __gsh; member in struct:sigcontext_ia32
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H A D | vm86.h | 89 unsigned short gs, __gsh; member in struct:vm86_regs
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H A D | sigcontext.h | 106 unsigned short gs, __gsh; member in struct:sigcontext 180 __u16 gs; member in struct:sigcontext
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H A D | kvm.h | 145 struct kvm_segment cs, ds, es, fs, gs, ss; member in struct:kvm_sregs
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/arch/x86/kernel/ |
H A D | process_32.c | 74 unsigned short ss, gs; local 79 gs = get_user_gs(regs); 83 savesegment(gs, gs); 96 (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss); 264 * Save away %gs. No need to save %fs, as it was saved on the 269 * and %gs. This could be an issue if the NMI handler ever 270 * used %fs or %gs (it does not today), or if the kernel is 273 lazy_save_gs(prev->gs); 318 * Restore %gs i [all...] |
H A D | process_64.c | 60 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs; local 84 asm("movl %%gs,%0" : "=r" (gsindex)); 87 rdmsrl(MSR_GS_BASE, gs); 99 fs, fsindex, gs, gsindex, shadowgs); 168 savesegment(gs, p->thread.gsindex); 169 p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs; 269 * - could test fs/gs bitsliced 304 /* We must save %fs and %gs before load_TLS() because 305 * %fs and %gs ma [all...] |
/arch/x86/kvm/ |
H A D | tss.h | 28 u32 gs; member in struct:tss_segment_32
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/arch/powerpc/platforms/cell/spufs/ |
H A D | sched.c | 358 int mem_aff, gs, lowest_offset; local 364 gs = 0; 367 gs++; 376 gang->aff_ref_spu = aff_ref_location(gang->aff_ref_ctx, mem_aff, gs,
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/arch/x86/boot/ |
H A D | boot.h | 104 asm volatile("movw %0,%%gs" : : "rm" (seg)); 106 static inline u16 gs(void) function 109 asm volatile("movw %%gs,%0" : "=rm" (seg)); 150 asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr)); 156 asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr)); 162 asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr)); 168 asm volatile("movb %1,%%gs:%0" : "+m" (*(u8 *)addr) : "qi" (v)); 172 asm volatile("movw %1,%%gs:%0" : "+m" (*(u16 *)addr) : "ri" (v)); 176 asm volatile("movl %1,%%gs:%0" : "+m" (*(u32 *)addr) : "ri" (v)); 190 asm volatile("gs; rep 255 u16 gs, fs; member in struct:biosregs::__anon3029::__anon3031 [all...] |