Searched defs:gs (Results 1 - 25 of 26) sorted by relevance

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/arch/x86/include/asm/
H A Dsuspend_32.h14 u16 es, fs, gs, ss; member in struct:saved_context
H A Dvm86.h28 unsigned short gs, __gsh; member in struct:kernel_vm86_regs
H A Dsigcontext.h8 unsigned short gs, __gsh; member in struct:sigcontext
60 unsigned short gs; member in struct:sigcontext
H A Dsuspend_64.h22 u16 ds, es, fs, gs, ss; member in struct:saved_context
H A Dlguest.h38 unsigned long gs; member in struct:lguest_regs
H A Dptrace.h22 unsigned long gs; member in struct:pt_regs
H A Duser32.h38 unsigned short fs, __fs, gs, __gs; member in struct:user_regs_struct32
H A Duser_32.h88 unsigned long gs; member in struct:user_regs_struct
H A Duser_64.h95 unsigned long gs; member in struct:user_regs_struct
H A Dparavirt.h280 static inline void load_gs_index(unsigned int gs) argument
282 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
H A Dsvm.h144 struct vmcb_seg gs; member in struct:vmcb_save_area
H A Dprocessor.h233 unsigned short gs, __gsh; member in struct:x86_hw_tss
421 * GCC hardcodes the stack canary as %gs:40. Since the
422 * irq_stack is the object at %gs:0, we reserve the bottom
446 char __pad[20]; /* canary at %gs:20 */
488 unsigned long gs; member in struct:thread_struct
/arch/arm/mach-s3c24xx/
H A Dcommon.c168 u32 gs = __raw_readl(S3C24XX_GSTATUS1); local
171 if ((gs >> 16) == 0x3245)
172 return gs;
/arch/x86/ia32/
H A Dia32_aout.c55 u32 fs, gs; local
91 savesegment(gs, gs);
92 dump->regs.gs = gs;
/arch/x86/include/asm/xen/
H A Dinterface_32.h68 uint16_t gs, _pad5; member in struct:cpu_user_regs
H A Dinterface_64.h52 #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
126 uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */ member in struct:cpu_user_regs
/arch/x86/include/uapi/asm/
H A Dsigcontext32.h53 unsigned short gs, __gsh; member in struct:sigcontext_ia32
H A Dvm86.h89 unsigned short gs, __gsh; member in struct:vm86_regs
H A Dsigcontext.h106 unsigned short gs, __gsh; member in struct:sigcontext
180 __u16 gs; member in struct:sigcontext
H A Dkvm.h145 struct kvm_segment cs, ds, es, fs, gs, ss; member in struct:kvm_sregs
/arch/x86/kernel/
H A Dprocess_32.c74 unsigned short ss, gs; local
79 gs = get_user_gs(regs);
83 savesegment(gs, gs);
96 (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);
264 * Save away %gs. No need to save %fs, as it was saved on the
269 * and %gs. This could be an issue if the NMI handler ever
270 * used %fs or %gs (it does not today), or if the kernel is
273 lazy_save_gs(prev->gs);
318 * Restore %gs i
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H A Dprocess_64.c60 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs; local
84 asm("movl %%gs,%0" : "=r" (gsindex));
87 rdmsrl(MSR_GS_BASE, gs);
99 fs, fsindex, gs, gsindex, shadowgs);
168 savesegment(gs, p->thread.gsindex);
169 p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
269 * - could test fs/gs bitsliced
304 /* We must save %fs and %gs before load_TLS() because
305 * %fs and %gs ma
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/arch/x86/kvm/
H A Dtss.h28 u32 gs; member in struct:tss_segment_32
/arch/powerpc/platforms/cell/spufs/
H A Dsched.c358 int mem_aff, gs, lowest_offset; local
364 gs = 0;
367 gs++;
376 gang->aff_ref_spu = aff_ref_location(gang->aff_ref_ctx, mem_aff, gs,
/arch/x86/boot/
H A Dboot.h104 asm volatile("movw %0,%%gs" : : "rm" (seg));
106 static inline u16 gs(void) function
109 asm volatile("movw %%gs,%0" : "=rm" (seg));
150 asm volatile("movb %%gs:%1,%0" : "=q" (v) : "m" (*(u8 *)addr));
156 asm volatile("movw %%gs:%1,%0" : "=r" (v) : "m" (*(u16 *)addr));
162 asm volatile("movl %%gs:%1,%0" : "=r" (v) : "m" (*(u32 *)addr));
168 asm volatile("movb %1,%%gs:%0" : "+m" (*(u8 *)addr) : "qi" (v));
172 asm volatile("movw %1,%%gs:%0" : "+m" (*(u16 *)addr) : "ri" (v));
176 asm volatile("movl %1,%%gs:%0" : "+m" (*(u32 *)addr) : "ri" (v));
190 asm volatile("gs; rep
255 u16 gs, fs; member in struct:biosregs::__anon3029::__anon3031
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