Searched defs:hwc (Results 1 - 25 of 41) sorted by relevance

12

/arch/x86/kernel/cpu/
H A Dperf_event_p6.c160 struct hw_perf_event *hwc = &event->hw; local
163 (void)wrmsrl_safe(hwc->config_base, val);
168 struct hw_perf_event *hwc = &event->hw; local
171 val = hwc->config;
180 (void)wrmsrl_safe(hwc->config_base, val);
H A Dperf_event_knc.c178 struct hw_perf_event *hwc = &event->hw; local
181 val = hwc->config;
184 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
189 struct hw_perf_event *hwc = &event->hw; local
192 val = hwc->config;
195 (void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
H A Dperf_event_amd.c197 static inline unsigned int amd_get_event_code(struct hw_perf_event *hwc) argument
199 return ((hwc->config >> 24) & 0x0f00) | (hwc->config & 0x00ff);
202 static inline int amd_is_nb_event(struct hw_perf_event *hwc) argument
204 return (hwc->config & 0xe0) == 0xe0;
295 struct hw_perf_event *hwc = &event->hw; local
312 * event can already be present yet not assigned (in hwc->idx)
317 if (new == -1 || hwc->idx == idx)
318 /* assign free slot, prefer hwc->idx */
542 struct hw_perf_event *hwc local
[all...]
H A Dperf_event_amd_iommu.c202 struct hw_perf_event *hwc = &event->hw; local
247 hwc->config = config;
248 hwc->extra_reg.config = config1;
297 struct hw_perf_event *hwc = &event->hw; local
300 if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
303 WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
304 hwc->state = 0;
307 u64 prev_raw_count = local64_read(&hwc->prev_count);
323 struct hw_perf_event *hwc = &event->hw; local
333 prev_raw_count = local64_read(&hwc
347 struct hw_perf_event *hwc = &event->hw; local
[all...]
H A Dperf_event_amd_uncore.c76 struct hw_perf_event *hwc = &event->hw; local
85 prev = local64_read(&hwc->prev_count);
86 rdpmcl(hwc->event_base_rdpmc, new);
87 local64_set(&hwc->prev_count, new);
95 struct hw_perf_event *hwc = &event->hw; local
98 wrmsrl(hwc->event_base, (u64)local64_read(&hwc->prev_count));
100 hwc->state = 0;
101 wrmsrl(hwc->config_base, (hwc
107 struct hw_perf_event *hwc = &event->hw; local
122 struct hw_perf_event *hwc = &event->hw; local
163 struct hw_perf_event *hwc = &event->hw; local
178 struct hw_perf_event *hwc = &event->hw; local
[all...]
H A Dperf_event_intel_rapl.c143 struct hw_perf_event *hwc = &event->hw; local
149 prev_raw_count = local64_read(&hwc->prev_count);
152 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
248 struct hw_perf_event *hwc = &event->hw; local
254 if (!(hwc->state & PERF_HES_STOPPED)) {
262 WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
263 hwc->state |= PERF_HES_STOPPED;
267 if ((mode & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
273 hwc->state |= PERF_HES_UPTODATE;
282 struct hw_perf_event *hwc local
[all...]
H A Dperf_event_intel_uncore_snb.c63 struct hw_perf_event *hwc = &event->hw; local
65 if (hwc->idx < UNCORE_PMC_IDX_FIXED)
66 wrmsrl(hwc->config_base, hwc->config | SNB_UNC_CTL_EN);
68 wrmsrl(hwc->config_base, SNB_UNC_CTL_EN);
220 struct hw_perf_event *hwc = &event->hw; local
222 return (u64)*(unsigned int *)(box->io_addr + hwc->event_base);
234 struct hw_perf_event *hwc = &event->hw; local
247 if (hwc->sample_period)
335 struct hw_perf_event *hwc local
362 struct hw_perf_event *hwc = &event->hw; local
567 struct hw_perf_event *hwc = &event->hw; local
[all...]
/arch/sh/kernel/cpu/sh4/
H A Dperf_event.c211 static void sh7750_pmu_disable(struct hw_perf_event *hwc, int idx) argument
220 static void sh7750_pmu_enable(struct hw_perf_event *hwc, int idx) argument
223 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx));
/arch/sh/kernel/cpu/sh4a/
H A Dperf_event.c235 static void sh4a_pmu_disable(struct hw_perf_event *hwc, int idx) argument
244 static void sh4a_pmu_enable(struct hw_perf_event *hwc, int idx) argument
254 tmp |= (hwc->config << 6) | CCBR_CMDS | CCBR_PPCE;
/arch/arc/kernel/
H A Dperf_event.c48 struct hw_perf_event *hwc, int idx)
55 prev_raw_count = local64_read(&hwc->prev_count);
57 } while (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
64 local64_sub(delta, &hwc->period_left);
99 struct hw_perf_event *hwc = &event->hw; local
108 hwc->config = arc_pmu->ev_hw_idx[event->attr.config];
110 (int) event->attr.config, (int) hwc->config);
116 hwc->config = arc_pmu->ev_hw_idx[ret];
146 struct hw_perf_event *hwc = &event->hw; local
147 int idx = hwc
47 arc_perf_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
164 struct hw_perf_event *hwc = &event->hw; local
198 struct hw_perf_event *hwc = &event->hw; local
[all...]
/arch/blackfin/kernel/
H A Dperf_event.c195 static void bfin_pfmon_disable(struct hw_perf_event *hwc, int idx) argument
200 static void bfin_pfmon_enable(struct hw_perf_event *hwc, int idx) argument
208 val |= (hwc->config << (PFMON1_P - PFMON0_P));
209 val |= (hwc->config & PFCNT0) << (PFCNT1_P - PFCNT0_P);
213 val |= hwc->config;
261 struct hw_perf_event *hwc, int idx)
280 prev_raw_count = local64_read(&hwc->prev_count);
283 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
304 struct hw_perf_event *hwc = &event->hw; local
305 int idx = hwc
260 bfin_perf_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
322 struct hw_perf_event *hwc = &event->hw; local
349 struct hw_perf_event *hwc = &event->hw; local
385 struct hw_perf_event *hwc = &event->hw; local
426 struct hw_perf_event *hwc; local
[all...]
/arch/powerpc/perf/
H A Dmpc7450-pmu.c263 static int mpc7450_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], argument
318 hwc[event_index[class][i]] = pmc - 1;
H A Dpower6-pmu.c178 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
211 hwc[i] = pmc;
177 p6_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) argument
H A Dpower7-pmu.c248 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
300 hwc[i] = pmc;
247 power7_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) argument
H A Dpower4-pmu.c359 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
509 hwc[i] = pmc;
358 p4_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) argument
H A Dpower5+-pmu.c455 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
589 hwc[i] = pmc;
454 power5p_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) argument
H A Dpower5-pmu.c386 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
531 hwc[i] = pmc;
385 power5_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) argument
H A Dppc970-pmu.c260 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
381 hwc[i] = pmc;
259 p970_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) argument
/arch/sh/kernel/
H A Dperf_event.c124 struct hw_perf_event *hwc = &event->hw; local
174 hwc->config |= config;
180 struct hw_perf_event *hwc, int idx)
199 prev_raw_count = local64_read(&hwc->prev_count);
202 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
223 struct hw_perf_event *hwc = &event->hw; local
224 int idx = hwc->idx;
227 sh_pmu->disable(hwc, idx);
241 struct hw_perf_event *hwc = &event->hw; local
242 int idx = hwc
179 sh_perf_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
268 struct hw_perf_event *hwc = &event->hw; local
[all...]
/arch/arm/kernel/
H A Dperf_event.c99 struct hw_perf_event *hwc = &event->hw; local
100 s64 left = local64_read(&hwc->period_left);
101 s64 period = hwc->sample_period;
106 local64_set(&hwc->period_left, left);
107 hwc->last_period = period;
113 local64_set(&hwc->period_left, left);
114 hwc->last_period = period;
121 local64_set(&hwc->prev_count, (u64)-left);
133 struct hw_perf_event *hwc = &event->hw; local
137 prev_raw_count = local64_read(&hwc
162 struct hw_perf_event *hwc = &event->hw; local
178 struct hw_perf_event *hwc = &event->hw; local
204 struct hw_perf_event *hwc = &event->hw; local
221 struct hw_perf_event *hwc = &event->hw; local
375 struct hw_perf_event *hwc = &event->hw; local
[all...]
H A Dperf_event_v6.c229 struct hw_perf_event *hwc = &event->hw; local
230 int counter = hwc->idx;
247 struct hw_perf_event *hwc = &event->hw; local
248 int counter = hwc->idx;
264 struct hw_perf_event *hwc = &event->hw; local
266 int idx = hwc->idx;
273 evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT0_SHIFT) |
277 evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT1_SHIFT) |
321 struct hw_perf_event *hwc; local
334 hwc
384 struct hw_perf_event *hwc = &event->hw; local
411 struct hw_perf_event *hwc = &event->hw; local
446 struct hw_perf_event *hwc = &event->hw; local
[all...]
/arch/metag/kernel/perf/
H A Dperf_event.c190 struct hw_perf_event *hwc, int idx)
205 prev_raw_count = local64_read(&hwc->prev_count);
208 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
218 local64_sub(delta, &hwc->period_left);
222 struct hw_perf_event *hwc, int idx)
224 s64 left = local64_read(&hwc->period_left);
225 s64 period = hwc->sample_period;
229 if (unlikely(period != hwc->last_period))
230 left += period - hwc->last_period;
234 local64_set(&hwc
189 metag_pmu_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
221 metag_pmu_event_set_period(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
262 struct hw_perf_event *hwc = &event->hw; local
294 struct hw_perf_event *hwc = &event->hw; local
310 struct hw_perf_event *hwc = &event->hw; local
352 struct hw_perf_event *hwc = &event->hw; local
365 struct hw_perf_event *hwc = &event->hw; local
544 struct hw_perf_event *hwc = &event->hw; local
756 struct hw_perf_event *hwc = &event->hw; local
[all...]
/arch/s390/kernel/
H A Dperf_cpum_cf.c103 static int validate_event(const struct hw_perf_event *hwc) argument
105 switch (hwc->config_base) {
111 if ((hwc->config >= 6 && hwc->config <= 31) ||
112 (hwc->config >= 38 && hwc->config <= 63) ||
113 (hwc->config >= 80 && hwc->config <= 127))
123 static int validate_ctr_version(const struct hw_perf_event *hwc) argument
131 switch (hwc
152 validate_ctr_auth(const struct hw_perf_event *hwc) argument
326 struct hw_perf_event *hwc = &event->hw; local
479 struct hw_perf_event *hwc = &event->hw; local
510 struct hw_perf_event *hwc = &event->hw; local
[all...]
/arch/alpha/kernel/
H A Dperf_event.c252 struct hw_perf_event *hwc, int idx)
254 long left = local64_read(&hwc->period_left);
255 long period = hwc->sample_period;
260 local64_set(&hwc->period_left, left);
261 hwc->last_period = period;
267 local64_set(&hwc->period_left, left);
268 hwc->last_period = period;
282 local64_set(&hwc->prev_count, (unsigned long)(-left));
307 struct hw_perf_event *hwc, int idx, long ovf)
313 prev_raw_count = local64_read(&hwc
251 alpha_perf_event_set_period(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
306 alpha_perf_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx, long ovf) argument
412 struct hw_perf_event *hwc = &pe->hw; local
435 struct hw_perf_event *hwc = &event->hw; local
487 struct hw_perf_event *hwc = &event->hw; local
525 struct hw_perf_event *hwc = &event->hw; local
533 struct hw_perf_event *hwc = &event->hw; local
553 struct hw_perf_event *hwc = &event->hw; local
604 struct hw_perf_event *hwc = &event->hw; local
814 struct hw_perf_event *hwc; local
[all...]
/arch/tile/kernel/
H A Dperf_event.c412 struct hw_perf_event *hwc = &event->hw; local
414 int shift, idx = hwc->idx;
447 cfg |= hwc->config << shift;
461 struct hw_perf_event *hwc = &event->hw; local
463 int idx = hwc->idx;
504 struct hw_perf_event *hwc = &event->hw; local
508 int idx = hwc->idx;
519 prev_raw_count = local64_read(&hwc->prev_count);
522 oldval = local64_cmpxchg(&hwc->prev_count, prev_raw_count,
539 local64_sub(delta, &hwc
550 struct hw_perf_event *hwc = &event->hw; local
594 struct hw_perf_event *hwc = &event->hw; local
654 struct hw_perf_event *hwc; local
791 struct hw_perf_event *hwc = &event->hw; local
885 struct hw_perf_event *hwc; local
[all...]

Completed in 613 milliseconds

12