Searched defs:mask (Results 151 - 175 of 690) sorted by relevance

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/arch/powerpc/include/asm/
H A Dword-at-a-time.h22 unsigned long mask = (val & c->low_bits) + c->low_bits; local
23 return ~(mask | rhs);
26 #define create_zero_mask(mask) (mask)
28 static inline long find_zero(unsigned long mask) argument
32 asm (PPC_CNTLZL "%0,%1" : "=r" (leading_zero_bits) : "r" (mask));
85 static inline unsigned long find_zero(unsigned long mask) argument
87 return mask >> 3;
91 static inline unsigned long zero_bytemask(unsigned long mask) argument
93 return (1UL << mask)
113 count_masked_bytes(long mask) argument
127 find_zero(unsigned long mask) argument
135 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; local
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/arch/powerpc/kernel/
H A Ddma-iommu.c76 static int dma_iommu_dma_supported(struct device *dev, u64 mask) argument
81 dev_info(dev, "Warning: IOMMU dma not supported: mask 0x%08llx"
82 ", table unavailable\n", mask);
86 if (tbl->it_offset > (mask >> tbl->it_page_shift)) {
87 dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
88 dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
89 mask, tbl->it_offset << tbl->it_page_shift);
98 u64 mask; local
102 mask = 1ULL < (fls_long(tbl->it_offset + tbl->it_size) - 1);
103 mask
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/arch/powerpc/platforms/82xx/
H A Dpq2ads-pci-pic.c35 u32 mask; member in struct:pq2ads_pci_pic::__anon2448
50 setbits32(&priv->regs->mask, 1 << irq);
66 clrbits32(&priv->regs->mask, 1 << irq);
84 u32 stat, mask, pend; local
89 mask = in_be32(&priv->regs->mask);
91 pend = stat & ~mask;
147 /* PCI interrupt controller registers: status and mask */
154 /* mask all PCI interrupts */
155 out_be32(&priv->regs->mask, ~
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/arch/powerpc/sysdev/
H A Dipic.h52 u8 mask; /* mask register offset from base */ member in struct:ipic_info
56 bit mask = 1 << (31 - bit) */
57 u8 prio_mask; /* priority mask value */
/arch/s390/include/asm/
H A Ddma-mapping.h21 extern int dma_set_mask(struct device *dev, u64 mask);
33 static inline int dma_supported(struct device *dev, u64 mask) argument
39 return dma_ops->dma_supported(dev, mask);
/arch/sh/boards/mach-cayman/
H A Dirq.c60 unsigned long mask; local
68 mask = __raw_readl(reg);
69 mask |= bit;
70 __raw_writel(mask, reg);
78 unsigned long mask; local
86 mask = __raw_readl(reg);
87 mask &= ~bit;
88 __raw_writel(mask, reg);
/arch/sh/boards/mach-dreamcast/
H A Dirq.c47 #define EMR_BASE 0x005f6910 /* Base event mask register */
68 __u32 mask; local
70 mask = inl(emr);
71 mask &= ~(1 << EVENT_BIT(irq));
72 outl(mask, emr);
80 __u32 mask; local
82 mask = inl(emr);
83 mask |= (1 << EVENT_BIT(irq));
84 outl(mask, emr);
/arch/sh/boards/mach-se/7206/
H A Dirq.c32 unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq))); local
37 val &= mask;
39 /* FPGA mask set */
71 /* FPGA mask reset */
/arch/sh/boards/mach-se/7343/
H A Dirq.c30 #define PA_CPLD_IMSK_REG 0x0a /* CPLD Interrupt mask register */
39 unsigned long mask; local
44 mask = ioread16(se7343_irq_regs + PA_CPLD_ST_REG);
46 for_each_set_bit(bit, &mask, SE7343_FPGA_IRQ_NR)
90 ct->regs.mask = PA_CPLD_IMSK_REG;
/arch/sh/boards/mach-se/7722/
H A Dirq.c38 unsigned long mask; local
43 mask = ioread16(se7722_irq_regs + IRQ01_STS_REG);
45 for_each_set_bit(bit, &mask, SE7722_FPGA_IRQ_NR)
89 ct->regs.mask = IRQ01_MASK_REG;
/arch/sh/boards/mach-se/7724/
H A Dirq.c29 unsigned short mask; member in struct:fpga_irq
53 set.mask = IRQ0_MASK;
59 set.mask = IRQ1_MASK;
65 set.mask = IRQ2_MASK;
101 intv &= set.mask;
118 __raw_writew(0xffff, IRQ0_MR); /* mask all */
119 __raw_writew(0xffff, IRQ1_MR); /* mask all */
120 __raw_writew(0xffff, IRQ2_MR); /* mask all */
/arch/sh/boards/mach-x3proto/
H A Dgpio.c67 unsigned long mask; local
72 mask = __raw_readw(KEYDETR);
73 for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
/arch/sh/include/asm/
H A Ddma-mapping.h15 static inline int dma_supported(struct device *dev, u64 mask) argument
20 return ops->dma_supported(dev, mask);
25 static inline int dma_set_mask(struct device *dev, u64 mask) argument
29 if (!dev->dma_mask || !dma_supported(dev, mask))
32 return ops->set_dma_mask(dev, mask);
34 *dev->dma_mask = mask;
/arch/sh/kernel/cpu/sh4a/
H A Dubc.c47 static void sh4a_ubc_enable_all(unsigned long mask) argument
52 if (mask & (1 << i))
83 static void sh4a_ubc_clear_triggered_mask(unsigned long mask) argument
85 __raw_writel(__raw_readl(UBC_CCMFR) & ~mask, UBC_CCMFR);
/arch/sparc/include/asm/
H A Ddma-mapping.h10 int dma_supported(struct device *dev, u64 mask);
76 static inline int dma_set_mask(struct device *dev, u64 mask) argument
80 if (!dev->dma_mask || !dma_supported(dev, mask))
82 *dev->dma_mask = mask;
H A Dspinlock_64.h157 unsigned long mask, tmp1, tmp2; local
159 mask = 0x80000000UL;
176 : "r" (lock), "r" (mask)
191 unsigned long mask, tmp1, tmp2, result; local
193 mask = 0x80000000UL;
207 : "r" (lock), "r" (mask)
/arch/sparc/lib/
H A Datomic32.c101 unsigned long ___set_bit(unsigned long *addr, unsigned long mask) argument
107 *addr = old | mask;
110 return old & mask;
114 unsigned long ___clear_bit(unsigned long *addr, unsigned long mask) argument
120 *addr = old & ~mask;
123 return old & mask;
127 unsigned long ___change_bit(unsigned long *addr, unsigned long mask) argument
133 *addr = old ^ mask;
136 return old & mask;
/arch/tile/include/asm/
H A Dsmp.h31 /* Send a message to processors specified in mask */
32 void send_IPI_many(const struct cpumask *mask, int tag);
74 static inline void arch_send_call_function_ipi_mask(struct cpumask *mask) argument
76 send_IPI_many(mask, MSG_TAG_CALL_FUNCTION_MANY);
119 * to express a mask or suppression or inclusion region without
/arch/tile/lib/
H A Dspinlock_32.c167 * reminds us that the high bits are garbage; we mask them out
240 u32 val, eq, mask; local
253 mask = 1 << WR_CURR_SHIFT;
254 val = __insn_addb(val, mask);
256 val = __insn_mz(eq & mask, val);
/arch/x86/boot/
H A Dcpuflags.c46 int has_eflag(unsigned long mask) argument
61 : "ri" (mask));
63 return !!((f0^f1) & mask);
/arch/x86/include/asm/
H A Dvgtod.h21 cycle_t mask; member in struct:vsyscall_gtod_data
/arch/x86/kernel/apic/
H A Dipi.c21 void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector) argument
28 * to an arbitrary mask, so I do a unicast to each CPU instead.
32 for_each_cpu(query_cpu, mask) {
39 void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, argument
49 for_each_cpu(query_cpu, mask) {
60 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, argument
68 * to an arbitrary mask, so I do a unicasts to each CPU instead. This
73 for_each_cpu(query_cpu, mask)
80 void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, argument
90 for_each_cpu(query_cpu, mask) {
105 unsigned long mask = cpumask_bits(cpumask)[0]; local
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H A Dx2apic_phys.c38 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) argument
49 for_each_cpu(query_cpu, mask) {
58 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) argument
60 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
64 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) argument
66 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
/arch/x86/kernel/
H A Dpci-dma.c61 int dma_set_mask(struct device *dev, u64 mask) argument
63 if (!dev->dma_mask || !dma_supported(dev, mask))
66 *dev->dma_mask = mask;
211 int dma_supported(struct device *dev, u64 mask) argument
216 if (mask > 0xffffffff && forbid_dac > 0) {
223 return ops->dma_supported(dev, mask);
228 if (mask < DMA_BIT_MASK(24))
243 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
244 dev_info(dev, "Force SAC with mask %Lx\n", mask);
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H A Dx86_init.c143 u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) argument
145 return x86_msi.msi_mask_irq(desc, mask, flag);

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