Searched defs:mask1 (Results 1 - 16 of 16) sorted by relevance

/drivers/irqchip/
H A Dirq-sirfsoc.c86 u32 mask1; member in struct:sirfsoc_irq_status
98 sirfsoc_irq_st.mask1 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK1);
110 writel_relaxed(sirfsoc_irq_st.mask1, base + SIRFSOC_INT_RISC_MASK1);
/drivers/net/hamradio/
H A Dhdlcdrv.c171 unsigned int mask1, mask2, mask3, mask4, mask5, mask6, word; local
189 for(i = 15, mask1 = 0x1fc00, mask2 = 0x1fe00, mask3 = 0x0fc00,
192 i--, mask1 <<= 1, mask2 <<= 1, mask3 <<= 1, mask4 <<= 1,
194 if ((s->hdlcrx.bitstream & mask1) == mask1)
267 unsigned int mask1, mask2, mask3; local
342 mask1 = 0x1f000;
346 for(i = 0; i < 8; i++, mask1 <<= 1, mask2 <<= 1,
348 if ((s->hdlctx.bitstream & mask1) != mask1)
[all...]
/drivers/staging/xgifb/
H A Dvb_init.c389 u8 shift_factor, u8 mask1, u8 mask2)
397 temp2 &= mask1;
388 XGI_SetDRAM_Helper(unsigned long P3d4, u8 seed, u8 temp2, u8 reg, u8 shift_factor, u8 mask1, u8 mask2) argument
/drivers/iio/adc/
H A Dtwl6030-gpadc.c696 unsigned int reg1, unsigned int mask0, unsigned int mask1,
702 val |= (trim_regs[reg1] & mask1) >> 1;
695 twl6032_get_trim_value(u8 *trim_regs, unsigned int reg0, unsigned int reg1, unsigned int mask0, unsigned int mask1, unsigned int shift0) argument
/drivers/pcmcia/
H A Dtcic.c241 u_int mask1; local
252 mask1 = 0;
256 mask1 |= (1 << i);
258 if ((mask1 & (1 << i)) && (try_irq(i) != 0)) {
259 mask1 ^= (1 << i);
263 if (mask1) {
270 mask1 |= (1 << i);
278 if (mask1 & (1<<i))
279 printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i);
282 return mask1;
[all...]
H A Di82365.c519 u_int mask1 = 0; local
533 mask1 |= (1 << i);
535 if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0))
536 mask1 ^= (1 << i);
540 if (mask1) {
546 mask1 |= (1 << i);
554 if (mask1 & (1<<i))
555 printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i);
556 if (mask1 == 0) printk("none!");
558 return mask1;
[all...]
/drivers/edac/
H A Damd64_edac.c800 u32 *mask1 = &pvt->csels[1].csmasks[cs]; local
809 if (!amd64_read_dct_pci_cfg(pvt, 1, reg0, mask1))
811 cs, *mask1, (pvt->fam == 0x10) ? reg1
H A Di5100_edac.c893 u16 mask1; local
916 mask1 = priv->inject_eccmask2;
920 pci_write_config_word(priv->mc, I5100_MEM0EINJMSK1, mask1);
923 pci_write_config_word(priv->mc, I5100_MEM1EINJMSK1, mask1);
/drivers/mfd/
H A Dmenelaus.c176 u8 mask1, mask2; member in struct:menelaus_chip
214 the_menelaus->mask1 &= ~(1 << irq);
216 the_menelaus->mask1);
228 the_menelaus->mask1 |= (1 << irq);
230 the_menelaus->mask1);
808 & ~menelaus->mask1;
1218 menelaus->mask1 = 0xff;
/drivers/net/can/
H A Dpch_can.c136 u32 mask1; member in struct:pch_can_if_regs
344 iowrite32(0xffff, &priv->regs->ifregs[0].mask1);
382 iowrite32(0, &priv->regs->ifregs[0].mask1);
405 iowrite32(0, &priv->regs->ifregs[1].mask1);
/drivers/tty/
H A Dnozomi.c1065 u16 read_iir, u16 mask1, u16 mask2)
1067 if (*toggle == 0 && read_iir & mask1) {
1069 writew(mask1, dc->reg_fcr);
1085 if (read_iir & mask1) {
1087 writew(mask1, dc->reg_fcr);
1064 handle_data_dl(struct nozomi *dc, enum port_type port, u8 *toggle, u16 read_iir, u16 mask1, u16 mask2) argument
/drivers/tty/serial/
H A Dioc3_serial.c822 * @mask1: mcr mask
826 int mask1, int mask2)
851 mcr |= mask1;
825 set_mcr(struct uart_port *the_port, int mask1, int mask2) argument
H A Dioc4_serial.c1552 * @mask1: mcr mask
1556 int mask1, int mask2)
1581 mcr |= mask1;
1555 set_mcr(struct uart_port *the_port, int mask1, int mask2) argument
/drivers/usb/host/
H A Dr8a66597-hcd.c1620 u16 mask0, mask1, mask2; local
1633 mask1 = intsts1 & intenb1;
1655 if (mask1) {
1656 if (mask1 & ATTCH) {
1663 if (mask1 & DTCH) {
1668 if (mask1 & BCHG) {
1674 if (mask1 & SIGN) {
1679 if (mask1 & SACK) {
/drivers/video/fbdev/
H A Dsh_mobile_hdmi.c1030 u8 status1, status2, mask1, mask2; local
1044 mask1 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_1);
1053 irq, status1, mask1, status2, mask2);
1055 if (!((status1 & mask1) | (status2 & mask2))) {
/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c2486 * @mask1: byte mask for bytes 64-127 of a packet
2491 * specified in @mask0/@mask1 in received packets and compare the CRC of
2496 u64 mask0, u64 mask1, unsigned int crc, bool enable)
2518 t4_write_reg(adap, EPIO_REG(DATA2), mask1);
2519 t4_write_reg(adap, EPIO_REG(DATA3), mask1 >> 32);
2495 t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, u64 mask0, u64 mask1, unsigned int crc, bool enable) argument

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