Searched defs:msr (Results 1 - 25 of 56) sorted by relevance

123

/arch/x86/kernel/cpu/
H A Dperfctr-watchdog.c43 /* converts an msr to an appropriate reservation bit */
44 static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) argument
49 if (msr >= MSR_F15H_PERF_CTR)
50 return (msr - MSR_F15H_PERF_CTR) >> 1;
51 return msr - MSR_K7_PERFCTR0;
54 return msr - MSR_ARCH_PERFMON_PERFCTR0;
58 return msr - MSR_P6_PERFCTR0;
60 return msr - MSR_KNC_PERFCTR0;
62 return msr - MSR_P4_BPU_PERFCTR0;
69 * converts an msr t
72 nmi_evntsel_msr_to_bit(unsigned int msr) argument
106 reserve_perfctr_nmi(unsigned int msr) argument
121 release_perfctr_nmi(unsigned int msr) argument
134 reserve_evntsel_nmi(unsigned int msr) argument
149 release_evntsel_nmi(unsigned int msr) argument
[all...]
H A Damd.c21 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) argument
29 gprs[1] = msr;
39 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val) argument
47 gprs[1] = msr;
642 * bit 6 of msr C001_0015
/arch/x86/lib/
H A Dmsr.c3 #include <asm/msr.h>
5 struct msr *msrs_alloc(void)
7 struct msr *msrs = NULL;
9 msrs = alloc_percpu(struct msr);
19 void msrs_free(struct msr *msrs)
28 * @msr: MSR to read
35 int msr_read(u32 msr, struct msr *m) argument
40 err = rdmsrl_safe(msr, &val);
50 * @msr
53 msr_write(u32 msr, struct msr *m) argument
58 __flip_bit(u32 msr, u8 bit, bool set) argument
94 msr_set_bit(u32 msr, u8 bit) argument
107 msr_clear_bit(u32 msr, u8 bit) argument
[all...]
/arch/m68k/bvme6000/
H A Drtc.c41 unsigned char msr; local
51 msr = rtc->msr & 0xc0;
52 rtc->msr = 0x40;
65 rtc->msr = msr;
107 msr = rtc->msr & 0xc0;
108 rtc->msr = 0x40;
122 rtc->msr
[all...]
H A Dconfig.c164 unsigned char msr = rtc->msr & 0xc0; local
166 rtc->msr = msr | 0x20; /* Ack the interrupt */
183 unsigned char msr = rtc->msr & 0xc0; local
185 rtc->msr = 0; /* Ensure timer registers accessible */
196 rtc->msr = 0x40; /* Access int.cntrl, etc */
201 rtc->msr = 0; /* Access timer 1 control */
204 rtc->msr
225 unsigned char msr = rtc->msr & 0xc0; local
272 unsigned char msr = rtc->msr & 0xc0; local
323 unsigned char msr = rtc->msr & 0xc0; local
[all...]
/arch/microblaze/kernel/
H A Dsetup.c100 unsigned int fdt, unsigned int msr, unsigned int tlb0,
167 if (msr) {
169 pr_cont("CPU don't have it %x\n", msr);
172 if (!msr) {
174 pr_cont("CPU have it %x\n", msr);
99 machine_early_init(const char *cmdline, unsigned int ram, unsigned int fdt, unsigned int msr, unsigned int tlb0, unsigned int tlb1) argument
/arch/mips/pci/
H A Dops-loongson2.c185 void _rdmsr(u32 msr, u32 *hi, u32 *lo) argument
194 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
201 void _wrmsr(u32 msr, u32 hi, u32 lo) argument
210 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
/arch/powerpc/include/uapi/asm/
H A Dkvm_para.h47 __u64 msr; member in struct:kvm_vcpu_arch_shared
/arch/powerpc/kernel/
H A Dppc32.h22 unsigned int msr; member in struct:pt_regs32
H A Dsignal_64.c95 unsigned long msr = regs->msr; local
110 msr |= MSR_VEC;
129 msr &= ~MSR_VSX;
143 msr |= MSR_VSX;
149 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
189 unsigned long msr = regs->msr; local
192 BUG_ON(!MSR_TM_ACTIVE(regs->msr));
199 regs->msr
309 unsigned long msr; local
408 unsigned long msr; local
665 unsigned long msr; local
[all...]
H A Dptrace.c100 REG_OFFSET_NAME(msr),
154 * Set of msr bits that gdb can change on behalf of a process.
173 return task->thread.regs->msr | task->thread.fpexc_mode;
176 static int set_user_msr(struct task_struct *task, unsigned long msr) argument
178 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
179 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
281 0, offsetof(struct pt_regs, msr));
283 unsigned long msr = get_user_msr(target); local
284 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
[all...]
H A Dsignal_32.c412 unsigned long msr = regs->msr; local
430 msr |= MSR_VEC;
432 /* else assert((regs->msr & MSR_VEC) == 0) */
452 msr &= ~MSR_VSX;
464 msr |= MSR_VSX;
476 msr |= MSR_SPE;
478 /* else assert((regs->msr & MSR_SPE) == 0) */
485 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
519 unsigned long msr local
667 unsigned long msr; local
777 unsigned long msr, msr_hi; local
[all...]
/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pm.c115 u32 msr, hid0; local
143 msr = mfmsr();
144 mtmsr(msr & ~MSR_POW);
163 mtmsr(msr & ~MSR_POW);
165 mtmsr(msr);
/arch/x86/kernel/
H A Damd_nb.c141 u64 base, msr; local
152 rdmsrl(address, msr);
155 if (!(msr & FAM10H_MMIO_CONF_ENABLE))
158 base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
160 segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
/arch/microblaze/include/uapi/asm/
H A Dptrace.h50 microblaze_reg_t msr; member in struct:pt_regs
/arch/powerpc/kvm/
H A Dbook3s_32_mmu.c374 u64 msr = kvmppc_get_msr(vcpu); local
376 if (msr & (MSR_DR|MSR_IR)) {
385 switch (msr & (MSR_DR|MSR_IR)) {
405 if (msr & MSR_PR)
H A Dbook3s_64_mmu.c585 u64 msr = kvmppc_get_msr(vcpu); local
587 if (msr & (MSR_DR|MSR_IR)) {
600 switch (msr & (MSR_DR|MSR_IR)) {
/arch/powerpc/sysdev/
H A Duic.c203 u32 msr; local
214 msr = mfdcr(uic->dcrbase + UIC_MSR);
215 if (!msr) /* spurious interrupt */
218 src = 32 - ffs(msr);
326 u32 msr; local
331 msr = mfdcr(primary_uic->dcrbase + UIC_MSR);
332 src = 32 - ffs(msr);
/arch/um/sys-ppc/shared/sysdep/
H A Dptrace.h20 PPC_REG msr; member in struct:sys_pt_regs_s
/arch/x86/include/asm/
H A Dmsr.h4 #include <uapi/asm/msr.h>
12 struct msr { struct
24 struct msr reg;
25 struct msr *msrs;
60 static inline unsigned long long native_read_msr(unsigned int msr) argument
64 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
68 static inline unsigned long long native_read_msr_safe(unsigned int msr, argument
80 : "c" (msr), [fault] "i" (-EIO));
84 static inline void native_write_msr(unsigned int msr, argument
87 asm volatile("wrmsr" : : "c" (msr), "
91 native_write_msr_safe(unsigned int msr, unsigned low, unsigned high) argument
147 wrmsr(unsigned msr, unsigned low, unsigned high) argument
159 wrmsr_safe(unsigned msr, unsigned low, unsigned high) argument
174 rdmsrl_safe(unsigned msr, unsigned long long *p) argument
[all...]
/arch/microblaze/include/asm/
H A Dthread_info.h56 __u32 msr; member in struct:cpu_context
/arch/x86/kvm/
H A Dpmu.c61 static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr, argument
64 if (msr >= base && msr < base + pmu->nr_arch_gp_counters)
65 return &pmu->gp_counters[msr - base];
69 static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr) argument
72 if (msr >= base && msr < base + pmu->nr_arch_fixed_counters)
73 return &pmu->fixed_counters[msr - base];
323 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr) argument
328 switch (msr) {
[all...]
/arch/frv/include/uapi/asm/
H A Dregisters.h192 unsigned long msr[2]; member in struct:user_fpmedia_regs
/arch/powerpc/lib/
H A Dsstep.c51 static unsigned long truncate_if_32bit(unsigned long msr, unsigned long val) argument
54 if ((msr & MSR_64BIT) == 0)
104 return truncate_if_32bit(regs->msr, ea);
121 return truncate_if_32bit(regs->msr, ea);
140 return truncate_if_32bit(regs->msr, ea);
539 if (!(regs->msr & MSR_64BIT))
560 if (!(regs->msr & MSR_64BIT)) {
661 regs->nip = truncate_if_32bit(regs->msr, regs->nip);
665 regs->nip = truncate_if_32bit(regs->msr, imm);
683 regs->link = truncate_if_32bit(regs->msr, reg
[all...]
/arch/x86/kernel/cpu/mcheck/
H A Dmce_amd.c34 #include <asm/msr.h>
119 int msr = (hi & MASK_LVTOFF_HI) >> 20; local
128 if (apic != msr) {

Completed in 483 milliseconds

123