| /drivers/gpu/drm/radeon/ |
| H A D | radeon_clocks.c | 38 uint32_t fb_div, ref_div, post_div, sclk; local
53 post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;
54 if (post_div == 2)
56 else if (post_div == 3)
58 else if (post_div == 4)
68 uint32_t fb_div, ref_div, post_div, mclk; local
83 post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;
84 if (post_div == 2)
86 else if (post_div == 3)
88 else if (post_div
346 calc_eng_mem_clock(struct radeon_device *rdev, uint32_t req_clock, int *fb_div, int *post_div) argument
389 int fb_div, post_div; local
[all...] |
| H A D | radeon_legacy_crtc.c | 756 } *post_div, post_divs[] = { local
822 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
823 if (post_div->divider == post_divider)
827 if (!post_div->divider)
828 post_div = &post_divs[0];
843 pll_fb_post_div = (feedback_div | (post_div->bitvalue << 16));
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| H A D | radeon_uvd.c | 831 unsigned post_div = vco_freq / target_freq; local
834 if (post_div < pd_min)
835 post_div = pd_min;
838 if ((vco_freq / post_div) > target_freq)
839 post_div += 1;
842 if (post_div > pd_even && post_div % 2)
843 post_div += 1;
845 return post_div;
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| H A D | rs780_dpm.c | 88 r600_engine_clock_entry_set_post_divider(rdev, 0, dividers.post_div);
454 (min_dividers.post_div != max_dividers.post_div) ||
456 (max_dividers.post_div != current_max_dividers.post_div))
988 u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 + local
991 (post_div * ref_div);
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| H A D | atombios_crtc.c | 812 u32 post_div,
839 args.v1.ucPostDiv = post_div;
849 args.v2.ucPostDiv = post_div;
859 args.v3.ucPostDiv = post_div;
876 args.v5.ucPostDiv = post_div;
905 args.v6.ucPostDiv = post_div;
1050 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; local
1077 pll->post_div = radeon_crtc->pll_post_div;
1082 &fb_div, &frac_fb_div, &ref_div, &post_div);
1085 &fb_div, &frac_fb_div, &ref_div, &post_div);
803 atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct radeon_atom_ss *ss) argument
[all...] |
| H A D | radeon_legacy_tv.c | 869 int post_div; local
871 case 1: post_div = 0; break;
872 case 2: post_div = 1; break;
873 case 3: post_div = 4; break;
874 case 4: post_div = 2; break;
875 case 6: post_div = 6; break;
876 case 8: post_div = 3; break;
877 case 12: post_div = 7; break;
879 default: post_div = 5; break;
881 return post_div;
[all...] |
| H A D | radeon_display.c | 887 * @post_div: post divider
896 static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, argument
901 ref_div_max = max(min(100 / post_div, ref_div_max), 1u);
904 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
905 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
925 * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div)
939 unsigned post_div_min, post_div_max, post_div; local
967 post_div_min = pll->post_div;
968 post_div_max = pll->post_div;
1012 for (post_div
1099 uint32_t post_div; local
[all...] |
| H A D | radeon_mode.h | 163 uint32_t post_div; member in struct:radeon_pll
532 u32 post_div; member in struct:atom_clock_dividers
572 u32 post_div; member in struct:atom_mpll_param
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| /drivers/gpu/drm/nouveau/core/subdev/clock/ |
| H A D | nvaa.c | 55 u32 post_div = 0; local
61 post_div = 1 << ((nv_rd32(clk, 0x4070) & 0x000f0000) >> 16);
64 post_div = (nv_rd32(clk, 0x4040) & 0x000f0000) >> 16;
74 clock = clock / post_div;
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| /drivers/media/tuners/ |
| H A D | tda18271-maps.c | 1069 u32 *freq, u8 *post_div, u8 *div)
1109 *post_div = map[i].pd;
1113 i, map_name, *post_div, *div);
1067 tda18271_lookup_pll_map(struct dvb_frontend *fe, enum tda18271_map_type map_type, u32 *freq, u8 *post_div, u8 *div) argument
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| /drivers/video/fbdev/aty/ |
| H A D | radeon_base.c | 1418 } *post_div, local
1487 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
1488 pll_output_freq = post_div->divider * freq;
1492 if (uses_dvo && (post_div->divider & 1))
1500 given by the terminal post_div->bitvalue */
1501 if ( !post_div->divider ) {
1502 post_div = &post_divs[post_div
[all...] |
| H A D | radeonfb.h | 232 int post_div; member in struct:radeon_regs
|