Searched defs:rFPGA0_TxGainStage (Results 1 - 7 of 7) sorted by relevance

/drivers/staging/rtl8188eu/include/
H A DHal8188EPhyReg.h76 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
518 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */
H A Drtw_mp_phy_regdef.h110 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
460 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */
/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phyreg.h62 #define rFPGA0_TxGainStage 0x80c macro
H A Dr819xE_phyreg.h47 #define rFPGA0_TxGainStage 0x80c macro
/drivers/staging/rtl8192u/
H A Dr819xU_phyreg.h42 #define rFPGA0_TxGainStage 0x80c macro
/drivers/staging/rtl8712/
H A Drtl871x_mp_phy_regdef.h88 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
432 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */
/drivers/staging/rtl8723au/include/
H A DHal8723APhyReg.h60 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ macro
451 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */

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