Searched defs:ramfc (Results 1 - 5 of 5) sorted by relevance

/drivers/gpu/drm/nouveau/core/engine/fifo/
H A Dnv50.h12 struct nouveau_gpuobj *ramfc; member in struct:nv50_fifo_base
H A Dnv50.c236 nv_wo32(base->ramfc, 0x08, lower_32_bits(args->v0.offset));
237 nv_wo32(base->ramfc, 0x0c, upper_32_bits(args->v0.offset));
238 nv_wo32(base->ramfc, 0x10, lower_32_bits(args->v0.offset));
239 nv_wo32(base->ramfc, 0x14, upper_32_bits(args->v0.offset));
240 nv_wo32(base->ramfc, 0x3c, 0x003f6078);
241 nv_wo32(base->ramfc, 0x44, 0x01003fff);
242 nv_wo32(base->ramfc, 0x48, chan->base.pushgpu->node->offset >> 4);
243 nv_wo32(base->ramfc, 0x4c, 0xffffffff);
244 nv_wo32(base->ramfc, 0x60, 0x7fffffff);
245 nv_wo32(base->ramfc,
332 struct nouveau_gpuobj *ramfc = base->ramfc; local
[all...]
H A Dnv84.c209 nv_wo32(base->ramfc, 0x08, lower_32_bits(args->v0.offset));
210 nv_wo32(base->ramfc, 0x0c, upper_32_bits(args->v0.offset));
211 nv_wo32(base->ramfc, 0x10, lower_32_bits(args->v0.offset));
212 nv_wo32(base->ramfc, 0x14, upper_32_bits(args->v0.offset));
213 nv_wo32(base->ramfc, 0x3c, 0x003f6078);
214 nv_wo32(base->ramfc, 0x44, 0x01003fff);
215 nv_wo32(base->ramfc, 0x48, chan->base.pushgpu->node->offset >> 4);
216 nv_wo32(base->ramfc, 0x4c, 0xffffffff);
217 nv_wo32(base->ramfc, 0x60, 0x7fffffff);
218 nv_wo32(base->ramfc,
308 struct nouveau_gpuobj *ramfc = base->ramfc; local
[all...]
H A Dnv04.h148 struct nouveau_gpuobj *ramfc; member in struct:nv04_fifo_priv
158 u32 ramfc; member in struct:nv04_fifo_chan
/drivers/gpu/drm/nouveau/core/subdev/instmem/
H A Dnv04.h21 struct nouveau_gpuobj *ramfc; member in struct:nv04_instmem_priv

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