| /drivers/gpu/drm/radeon/ |
| H A D | radeon_clocks.c | 38 uint32_t fb_div, ref_div, post_div, sclk; local
45 ref_div =
48 if (ref_div == 0)
51 sclk = fb_div / ref_div;
68 uint32_t fb_div, ref_div, post_div, mclk; local
75 ref_div =
78 if (ref_div == 0)
81 mclk = fb_div / ref_div;
351 int ref_div = spll->reference_div; local
353 if (!ref_div)
[all...] |
| H A D | radeon_legacy_crtc.c | 262 static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div, argument
267 if (!ref_div)
270 vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div;
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| H A D | rs780_dpm.c | 86 r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div);
453 if ((min_dividers.ref_div != max_dividers.ref_div) ||
455 (max_dividers.ref_div != current_max_dividers.ref_div) ||
987 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; local
991 (post_div * ref_div);
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| H A D | atombios_crtc.c | 609 /* use recommended ref_div for ss */
809 u32 ref_div,
836 args.v1.usRefDiv = cpu_to_le16(ref_div);
846 args.v2.usRefDiv = cpu_to_le16(ref_div);
856 args.v3.usRefDiv = cpu_to_le16(ref_div);
873 args.v5.ucRefDiv = ref_div;
902 args.v6.ucRefDiv = ref_div;
1050 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; local
1082 &fb_div, &frac_fb_div, &ref_div, &post_div);
1085 &fb_div, &frac_fb_div, &ref_div,
803 atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct radeon_atom_ss *ss) argument
[all...] |
| H A D | rv770_dpm.h | 114 u32 ref_div; member in struct:rv7xx_power_info
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| H A D | r600.c | 125 unsigned fb_div = 0, ref_div, vclk_div = 0, dclk_div = 0; local
148 ref_div = 34;
150 ref_div = 4;
153 ref_div + 1, 0xFFF, 2, 30, ~0,
178 UPLL_REF_DIV(ref_div),
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| H A D | radeon_display.c | 891 * @ref_div: resulting reference divider
898 unsigned *fb_div, unsigned *ref_div)
904 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
905 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
909 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);
925 * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div)
940 unsigned ref_div_min, ref_div_max, ref_div; local
1015 ref_div_max, &fb_div, &ref_div);
1017 (ref_div * post_di
896 avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) argument
1140 uint32_t ref_div; local
[all...] |
| H A D | radeon_mode.h | 547 u32 ref_div; member in struct:atom_clock_dividers
|
| /drivers/media/dvb-frontends/ |
| H A D | tda8261.c | 84 static const u8 ref_div[] = { 0x00, 0x01, 0x02, 0x05, 0x07 }; variable
136 buf[2] = (0x01 << 7) | ((ref_div[config->step_size] & 0x07) << 1);
|
| /drivers/net/wireless/ath/ath9k/ |
| H A D | ar9002_phy.c | 451 int ref_div = 5; local
457 ref_div = 10;
464 pll = SM(ref_div, AR_RTC_9160_PLL_REFDIV);
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| /drivers/video/fbdev/aty/ |
| H A D | atyfb.h | 50 int ref_div; member in struct:pll_info
|
| H A D | radeon_base.c | 460 unsigned sclk, mclk, tmp, ref_div; local
574 ref_div = INPLL(PPLL_REF_DIV) & 0x3ff;
584 rinfo->pll.ref_div = ref_div;
653 rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;
676 rinfo->pll.ref_div = BIOS_IN16(pll_info_block + 0x10);
711 rinfo->pll.ref_div,
1505 pr_debug("ref_div = %d, ref_clk = %d, output_freq = %d\n",
1506 rinfo->pll.ref_div, rinfo->pll.ref_clk,
1515 pr_debug("ref_div
[all...] |
| H A D | radeonfb.h | 141 int ref_div; member in struct:pll_info
|