| /drivers/gpu/drm/radeon/ |
| H A D | evergreen.c | 4759 wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
4760 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
4771 u32 rptr; local
4789 rptr = rdev->ih.rptr;
4790 DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
4798 while (rptr != wptr) {
4799 /* wptr/rptr are in bytes! */
4800 ring_index = rptr /
[all...] |
| H A D | r100.c | 1049 u32 rptr; local
1052 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
1054 rptr = RREG32(RADEON_CP_RB_RPTR);
1056 return rptr;
1133 * the rptr copy in system ram */
1213 DRM_ERROR("failed to get scratch reg for rptr save (%d).\n", r);
2985 seq_printf(m, "Ring rptr %u\n", r_rptr);
2987 seq_printf(m, "Indirect1 rptr %u\n", ib1_rptr);
2989 seq_printf(m, "Indirect2 rptr %u\n", ib2_rptr);
|
| H A D | si.c | 5885 /* set rptr, wptr to 0 */
5889 rdev->ih.rptr = 0;
5999 /* set rptr, wptr to 0 */
6334 wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
6335 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
6356 u32 rptr; local
6373 rptr = rdev->ih.rptr;
6374 DRM_DEBUG("si_irq_process start: rptr %d, wptr %d\n", rptr, wpt
[all...] |
| H A D | cik.c | 4440 u32 rptr; local
4443 rptr = rdev->wb.wb[ring->rptr_offs/4];
4445 rptr = RREG32(CP_RB0_RPTR);
4447 return rptr;
4470 u32 rptr; local
4473 rptr = rdev->wb.wb[ring->rptr_offs/4];
4477 rptr = RREG32(CP_HQD_PQ_RPTR);
4482 return rptr;
7070 * There is a rptr (read pointer) that determines where the
7077 * equal again at which point it updates the rptr
7804 u32 rptr; local
[all...] |
| H A D | radeon.h | 949 unsigned rptr; member in struct:r600_ih
|
| /drivers/net/ethernet/sfc/ |
| H A D | ef10.c | 2047 efx_dword_t rptr; local
2055 EFX_POPULATE_DWORD_2(rptr, ERF_DD_EVQ_IND_RPTR_FLAGS,
2061 efx_writed_page(efx, &rptr, ER_DD_EVQ_INDIRECT,
2063 EFX_POPULATE_DWORD_2(rptr, ERF_DD_EVQ_IND_RPTR_FLAGS,
2068 efx_writed_page(efx, &rptr, ER_DD_EVQ_INDIRECT,
2071 EFX_POPULATE_DWORD_1(rptr, ERF_DZ_EVQ_RPTR,
2074 efx_writed_page(efx, &rptr, ER_DZ_EVQ_RPTR, channel->channel);
|
| /drivers/net/ethernet/tehuti/ |
| H A D | tehuti.h | 146 u32 rptr, wptr; /* cached values of RPTR and WPTR registers, member in struct:fifo
201 struct tx_map *rptr; /* points to the next element to read */ member in struct:txdb
|
| /drivers/usb/gadget/udc/ |
| H A D | fsl_qe_udc.h | 120 u32 rptr; member in struct:usb_device_para
|
| /drivers/infiniband/hw/cxgb3/ |
| H A D | cxio_wr.h | 46 #define Q_EMPTY(rptr,wptr) ((rptr)==(wptr))
47 #define Q_FULL(rptr,wptr,size_log2) ( (((wptr)-(rptr))>>(size_log2)) && \
48 ((rptr)!=(wptr)) )
50 #define Q_FREECNT(rptr,wptr,size_log2) ((1UL<<size_log2)-((wptr)-(rptr)))
51 #define Q_COUNT(rptr,wptr) ((wptr)-(rptr))
717 u32 rptr; member in struct:t3_cq
[all...] |
| /drivers/net/ethernet/sun/ |
| H A D | cassini.c | 4163 u32 wptr, rptr; local
4176 rptr = readl(cp->regs + REG_TX_FIFO_READ_PTR);
4177 if ((val == 0) && (wptr != rptr)) {
4180 val, wptr, rptr);
|