Searched defs:sar (Results 1 - 14 of 14) sorted by relevance

/drivers/clk/mvebu/
H A Darmada-370.c47 static u32 __init a370_get_tclk_freq(void __iomem *sar) argument
51 tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) &
66 static u32 __init a370_get_cpu_freq(void __iomem *sar) argument
71 cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) &
116 void __iomem *sar, int id, int *mult, int *div)
118 u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) &
137 static bool a370_is_sscg_enabled(void __iomem *sar) argument
139 return !(readl(sar) & SARL_A370_SSCG_ENABLE);
115 a370_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
H A Darmada-375.c52 static u32 __init armada_375_get_tclk_freq(void __iomem *sar) argument
56 tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) &
73 static u32 __init armada_375_get_cpu_freq(void __iomem *sar) argument
77 cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) &
117 void __iomem *sar, int id, int *mult, int *div)
119 u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) &
116 armada_375_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
H A Darmada-38x.c39 static u32 __init armada_38x_get_tclk_freq(void __iomem *sar) argument
43 tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) &
55 static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) argument
59 cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) &
100 void __iomem *sar, int id, int *mult, int *div)
102 u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) &
99 armada_38x_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
H A Ddove.c88 static u32 __init dove_get_tclk_freq(void __iomem *sar) argument
90 u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) &
107 static u32 __init dove_get_cpu_freq(void __iomem *sar) argument
109 u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) &
127 void __iomem *sar, int id, int *mult, int *div)
132 u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) &
140 u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) &
126 dove_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
H A Darmada-xp.c50 static u32 __init axp_get_tclk_freq(void __iomem *sar) argument
70 static u32 __init axp_get_cpu_freq(void __iomem *sar) argument
75 cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) &
81 cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) &
126 void __iomem *sar, int id, int *mult, int *div)
128 u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) &
134 opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) &
125 axp_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
H A Dorion.c30 static u32 __init mv88f5182_get_tclk_freq(void __iomem *sar) argument
32 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) &
45 static u32 __init mv88f5182_get_cpu_freq(void __iomem *sar) argument
47 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
59 static void __init mv88f5182_get_clk_ratio(void __iomem *sar, int id, argument
62 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
95 static u32 __init mv88f5281_get_tclk_freq(void __iomem *sar) argument
104 static u32 __init mv88f5281_get_cpu_freq(void __iomem *sar) argument
106 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
116 static void __init mv88f5281_get_clk_ratio(void __iomem *sar, in argument
155 mv88f6183_get_tclk_freq(void __iomem *sar) argument
170 mv88f6183_get_cpu_freq(void __iomem *sar) argument
182 mv88f6183_get_clk_ratio(void __iomem *sar, int id, int *mult, int *div) argument
[all...]
H A Dkirkwood.c88 static u32 __init kirkwood_get_tclk_freq(void __iomem *sar) argument
90 u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) &
110 static u32 __init kirkwood_get_cpu_freq(void __iomem *sar) argument
112 u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar));
129 void __iomem *sar, int id, int *mult, int *div)
134 u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar));
141 u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) &
157 static u32 __init mv88f6180_get_cpu_freq(void __iomem *sar) argument
159 u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK;
169 void __iomem *sar, in
128 kirkwood_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
168 mv88f6180_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
[all...]
/drivers/dma/sh/
H A Dshdma.h49 u32 sar; /* SAR / source address */ member in struct:sh_dmae_regs
H A Drcar-hpbdma.c112 u32 sar; /* SAR / source address */ member in struct:hpb_dmae_regs
271 ch_reg_write(hpb_chan, hw->sar,
370 desc->hw.sar = src;
/drivers/media/platform/s5p-mfc/
H A Ds5p_mfc_enc.c1347 static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar) argument
1369 return t[sar];
/drivers/dma/
H A Dfsldma.h108 u64 sar; /* 0x10 - Source Address Register */ member in struct:fsldma_chan_regs
H A Dintel_mid_dma_regs.h251 dma_addr_t sar; member in struct:intel_mid_dma_desc
271 dma_addr_t sar; member in struct:intel_mid_dma_lli
/drivers/dma/dw/
H A Dregs.h314 u32 sar; member in struct:dw_lli
/drivers/ata/
H A Dsata_dwc_460ex.c65 struct dmareg sar; /* Source Address */ member in struct:dma_chan_regs
116 u32 sar; /* Source Address */ member in struct:lli
638 lli[idx].sar = cpu_to_le32((u32)dmadr_addr);
653 lli[idx].sar = cpu_to_le32(addr);

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