Searched defs:sctrl (Results 1 - 6 of 6) sorted by relevance

/drivers/gpu/drm/nouveau/core/subdev/clock/
H A Dnvaa.c37 u32 cctrl, sctrl; member in struct:nvaa_clock_priv
253 priv->sctrl = (divs + P2) << 16;
257 priv->sctrl = P1 << 16;
277 priv->scoef, priv->spost, priv->sctrl);
340 nv_mask(clk, 0x4020, 0x00070000, priv->sctrl);
345 nv_wr32(clk, 0x4020, 0x80000000 | priv->sctrl);
/drivers/hv/
H A Dhv.c337 union hv_synic_scontrol sctrl; local
375 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
376 sctrl.enable = 1;
378 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
/drivers/gpu/drm/radeon/
H A Dradeon_cp.c1465 u32 sctrl; local
1509 sctrl = RADEON_READ(RADEON_SURFACE_CNTL);
1515 RADEON_WRITE(RADEON_SURFACE_CNTL, sctrl);
/drivers/isdn/hardware/mISDN/
H A Dhfcsusb.c696 __u8 conhdlc, sctrl, sctrl_r; local
743 sctrl = 0x40 + ((hw->protocol == ISDN_P_TE_S0) ? 0x00 : 0x04);
746 sctrl |= 1;
750 sctrl |= 2;
753 write_reg(hw, HFCUSB_SCTRL, sctrl);
H A Dhfcpci.c104 unsigned char sctrl; member in struct:hfcPCI_hw
187 hc->hw.sctrl |= SCTRL_MODE_NT; /* NT-MODE */
191 hc->hw.sctrl &= ~SCTRL_MODE_NT; /* TE-MODE */
198 Write_hfc(hc, HFCPCI_SCTRL, hc->hw.sctrl);
244 hc->hw.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */
1302 hc->hw.sctrl &= ~SCTRL_B2_ENA;
1305 hc->hw.sctrl &= ~SCTRL_B1_ENA;
1334 hc->hw.sctrl |= SCTRL_B2_ENA;
1340 hc->hw.sctrl |= SCTRL_B1_ENA;
1369 hc->hw.sctrl |
[all...]
/drivers/isdn/hisax/
H A Dhisax.h695 unsigned char sctrl; member in struct:hfcPCI_hw
722 unsigned char sctrl; member in struct:hfcSX_hw
750 unsigned char sctrl; member in struct:hfcD_hw

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