Searched defs:spll (Results 1 - 6 of 6) sorted by last modified time
/drivers/gpu/drm/nouveau/core/subdev/clock/ |
H A D | nv40.c | 36 u32 spll; member in struct:nv40_clock_priv 180 priv->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; 183 priv->spll = 0x00000000; 197 nv_mask(priv, 0x004008, 0xc007ffff, priv->spll);
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/drivers/gpu/drm/radeon/ |
H A D | radeon.h | 262 struct radeon_pll spll; member in struct:radeon_clock
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H A D | radeon_atombios.c | 1123 struct radeon_pll *spll = &rdev->clock.spll; local 1176 spll->reference_freq = 1179 spll->reference_freq = 1181 spll->reference_div = 0; 1183 spll->pll_out_min = 1185 spll->pll_out_max = 1189 if (spll->pll_out_min == 0) { 1191 spll->pll_out_min = 64800; 1193 spll [all...] |
H A D | radeon_clocks.c | 37 struct radeon_pll *spll = &rdev->clock.spll; local 43 fb_div *= spll->reference_freq; 106 struct radeon_pll *spll = &rdev->clock.spll; local 145 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; 146 spll->reference_div = mpll->reference_div = 181 struct radeon_pll *spll = &rdev->clock.spll; local 209 if (spll 350 struct radeon_pll *spll = &rdev->clock.spll; local [all...] |
H A D | radeon_combios.c | 736 struct radeon_pll *spll = &rdev->clock.spll; local 763 spll->reference_freq = RBIOS16(pll_info + 0x1a); 764 spll->reference_div = RBIOS16(pll_info + 0x1c); 765 spll->pll_out_min = RBIOS32(pll_info + 0x1e); 766 spll->pll_out_max = RBIOS32(pll_info + 0x22); 769 spll->pll_in_min = RBIOS32(pll_info + 0x48); 770 spll->pll_in_max = RBIOS32(pll_info + 0x4c); 773 spll->pll_in_min = 40; 774 spll [all...] |
/drivers/clk/samsung/ |
H A D | clk-exynos5420.c | 147 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator in enum:exynos5x_plls 1236 [spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK,
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