Searched defs:stat (Results 1 - 25 of 355) sorted by relevance

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/drivers/gpu/drm/nouveau/core/engine/disp/
H A Dsornv50.c42 u32 stat; local
49 stat = !!args->v0.state;
54 nv_mask(priv, 0x61c004 + soff, 0x80000001, 0x80000000 | stat);
H A Ddacnv50.c42 u32 stat; local
51 stat = 0x00000040 * !args->v0.state;
52 stat |= 0x00000010 * !args->v0.data;
53 stat |= 0x00000004 * !args->v0.vsync;
54 stat |= 0x00000001 * !args->v0.hsync;
59 nv_mask(priv, 0x61a004 + doff, 0xc000007f, 0x80000000 | stat);
/drivers/block/rsxx/
H A Drsxx.h35 __u32 stat; member in struct:rsxx_reg_access
/drivers/gpu/drm/nouveau/core/include/subdev/
H A Dbus.h8 u32 stat; member in struct:nouveau_bus_intr
/drivers/gpu/drm/nouveau/core/subdev/bus/
H A Dnv31.c32 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); local
41 if (stat & 0x00000008) { /* NV41- */
49 stat &= ~0x00000008;
53 if (stat & 0x00070000) {
57 stat &= ~0x00070000;
61 if (stat) {
62 nv_error(pbus, "unknown intr 0x%08x\n", stat);
63 nv_mask(pbus, 0x001140, stat, 0x00000000);
H A Dnv50.c50 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); local
52 if (stat & 0x00000008) {
60 stat &= ~0x00000008;
64 if (stat & 0x00010000) {
68 stat &= ~0x00010000;
72 if (stat) {
73 nv_error(pbus, "unknown intr 0x%08x\n", stat);
74 nv_mask(pbus, 0x001140, stat, 0);
H A Dnvc0.c32 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); local
34 if (stat & 0x0000000e) {
41 (stat & 0x00000002) ? "!ENGINE " : "",
42 (stat & 0x00000004) ? "IBUS " : "",
43 (stat & 0x00000008) ? "TIMEOUT " : "");
46 nv_wr32(pbus, 0x001100, (stat & 0x0000000e));
47 stat &= ~0x0000000e;
50 if (stat) {
51 nv_error(pbus, "unknown intr 0x%08x\n", stat);
52 nv_mask(pbus, 0x001140, stat,
[all...]
H A Dnv04.c32 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); local
34 if (stat & 0x00000001) {
36 stat &= ~0x00000001;
40 if (stat & 0x00000110) {
44 stat &= ~0x00000110;
48 if (stat) {
49 nv_error(pbus, "unknown intr 0x%08x\n", stat);
50 nv_mask(pbus, 0x001140, stat, 0x00000000);
/drivers/gpu/drm/nouveau/core/subdev/i2c/
H A Dnve0.c31 u32 stat = nv_rd32(i2c, 0x00dc68) & intr, i; local
33 if ((stat & (1 << (i * 4)))) *hi |= 1 << i;
34 if ((stat & (2 << (i * 4)))) *lo |= 1 << i;
35 if ((stat & (4 << (i * 4)))) *rq |= 1 << i;
36 if ((stat & (8 << (i * 4)))) *tx |= 1 << i;
/drivers/gpu/drm/nouveau/core/subdev/mc/
H A Dpriv.h25 u32 stat; member in struct:nouveau_mc_intr
H A Dbase.c61 u32 stat = intr = nouveau_mc_intr_mask(pmc); local
62 while (map->stat) {
63 if (intr & map->stat) {
67 stat &= ~map->stat;
72 if (stat)
73 nv_error(pmc, "unknown intr 0x%08x\n", stat);
/drivers/devfreq/
H A Dgovernor_simpleondemand.c24 struct devfreq_dev_status stat; local
25 int err = df->profile->get_dev_status(df->dev.parent, &stat);
46 if (stat.total_time == 0) {
52 if (stat.busy_time >= (1 << 24) || stat.total_time >= (1 << 24)) {
53 stat.busy_time >>= 7;
54 stat.total_time >>= 7;
58 if (stat.busy_time * 100 >
59 stat.total_time * dfso_upthreshold) {
65 if (stat
[all...]
/drivers/gpu/drm/nouveau/core/subdev/gpio/
H A Dnv10.c85 u32 stat = nv_rd32(gpio, 0x001144) & intr; local
86 *lo = (stat & 0xffff0000) >> 16;
87 *hi = (stat & 0x0000ffff);
/drivers/ide/
H A Dide-lib.c126 * @stat: status byte to decode
133 u8 ide_dump_status(ide_drive_t *drive, const char *msg, u8 stat) argument
137 printk(KERN_ERR "%s: %s: status=0x%02x { ", drive->name, msg, stat);
138 if (stat & ATA_BUSY)
141 if (stat & ATA_DRDY)
143 if (stat & ATA_DF)
145 if (stat & ATA_DSC)
147 if (stat & ATA_DRQ)
149 if (stat & ATA_CORR)
151 if (stat
[all...]
/drivers/gpu/drm/nouveau/core/engine/copy/
H A Dnve0.c74 u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000)); local
76 if (stat) {
77 nv_warn(priv, "unhandled intr 0x%08x\n", stat);
78 nv_wr32(priv, 0x104908 + (ce * 0x1000), stat);
/drivers/gpu/drm/nouveau/core/engine/crypt/
H A Dnv84.c119 u32 stat = nv_rd32(priv, 0x102130); local
128 if (stat) {
130 nouveau_bitfield_print(nv84_crypt_intr_mask, stat);
136 nv_wr32(priv, 0x102130, stat);
H A Dnv98.c90 u32 stat = nv_rd32(priv, 0x087008) & disp & ~(disp >> 16); local
102 if (stat & 0x00000040) {
109 stat &= ~0x00000040;
112 if (stat) {
113 nv_error(priv, "unhandled intr 0x%08x\n", stat);
114 nv_wr32(priv, 0x087004, stat);
/drivers/gpu/drm/nouveau/core/engine/mpeg/
H A Dnv40.c100 u32 stat; local
102 if ((stat = nv_rd32(priv, 0x00b100)))
105 if ((stat = nv_rd32(priv, 0x00b800))) {
106 nv_error(priv, "PMSRCH 0x%08x\n", stat);
107 nv_wr32(priv, 0x00b800, stat);
/drivers/gpu/drm/nouveau/core/subdev/ibus/
H A Dnvc0.c36 u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0400)); local
37 nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
46 u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0400)); local
47 nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
56 u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0400)); local
57 nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
73 u32 stat = 0x00000100 << i; local
74 if (intr0 & stat) {
76 intr0 &= ~stat;
81 u32 stat local
89 u32 stat = 0x00000001 << i; local
[all...]
H A Dnve0.c36 u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0800)); local
37 nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
46 u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0800)); local
47 nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
56 u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0800)); local
57 nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
73 u32 stat = 0x00000100 << i; local
74 if (intr0 & stat) {
76 intr0 &= ~stat;
81 u32 stat local
89 u32 stat = 0x00000001 << i; local
[all...]
/drivers/irqchip/
H A Dirq-dw-apb-ictl.c34 u32 stat; local
40 stat = readl_relaxed(gc->reg_base +
42 while (stat) {
43 u32 hwirq = ffs(stat) - 1;
46 stat &= ~(1 << hwirq);
/drivers/isdn/hisax/
H A Dhfcscard.c25 u_char val, stat; local
30 (stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) {
33 debugl1(cs, "HFCS: stat(%02x) s1(%02x)", stat, val);
37 debugl1(cs, "HFCS: irq_no_irq stat(%02x)", stat);
/drivers/media/pci/mantis/
H A Dhopper_cards.c68 u32 stat = 0, mask = 0; local
81 stat = mmread(MANTIS_INT_STAT);
83 if (!(stat & mask))
95 mantis->mantis_int_stat = stat;
97 dprintk(MANTIS_DEBUG, 0, "\n-- Stat=<%02x> Mask=<%02x> --", stat, mask);
98 if (stat & MANTIS_INT_RISCEN) {
101 if (stat & MANTIS_INT_IRQ0) {
107 if (stat & MANTIS_INT_IRQ1) {
111 if (stat & MANTIS_INT_OCERR) {
114 if (stat
[all...]
H A Dmantis_cards.c76 u32 stat = 0, mask = 0; local
89 stat = mmread(MANTIS_INT_STAT);
91 if (!(stat & mask))
103 mantis->mantis_int_stat = stat;
105 dprintk(MANTIS_DEBUG, 0, "\n-- Stat=<%02x> Mask=<%02x> --", stat, mask);
106 if (stat & MANTIS_INT_RISCEN) {
109 if (stat & MANTIS_INT_IRQ0) {
115 if (stat & MANTIS_INT_IRQ1) {
119 if (stat & MANTIS_INT_OCERR) {
122 if (stat
[all...]
H A Dmantis_i2c.c40 u32 rxd, i, stat, trials; local
59 stat = mmread(MANTIS_INT_STAT);
60 if (stat & MANTIS_INT_I2CDONE)
68 stat = mmread(MANTIS_INT_STAT);
69 if (stat & MANTIS_INT_I2CRACK)
87 u32 txd = 0, stat, trials; local
107 stat = mmread(MANTIS_INT_STAT);
108 if (stat & MANTIS_INT_I2CDONE)
116 stat = mmread(MANTIS_INT_STAT);
117 if (stat
131 u32 stat, data, txd; local
[all...]

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