Searched defs:tcr (Results 1 - 11 of 11) sorted by relevance

/drivers/dma/sh/
H A Dshdma.h51 u32 tcr; /* TCR / transfer count */ member in struct:sh_dmae_regs
H A Drcar-hpbdma.c114 u32 tcr; /* TCR / transfer count */ member in struct:hpb_dmae_regs
275 ch_reg_write(hpb_chan, hw->tcr >> hpb_chan->xmit_shift,
372 desc->hw.tcr = *len;
382 u32 tcr = ch_reg_read(chan, desc->plane_idx ? local
385 return (desc->hw.tcr - tcr) << chan->xmit_shift;
/drivers/clocksource/
H A Dtimer-keystone.c80 u32 tcr; local
83 tcr = keystone_timer_readl(TCR);
84 off = tcr & ~(TCR_ENAMODE_MASK);
89 tcr |= TCR_ENAMODE_ONESHOT_MASK;
92 tcr |= TCR_ENAMODE_PERIODIC_MASK;
115 keystone_timer_writel(tcr, TCR);
121 u32 tcr; local
123 tcr = keystone_timer_readl(TCR);
126 tcr &= ~(TCR_ENAMODE_MASK);
127 keystone_timer_writel(tcr, TC
[all...]
/drivers/staging/comedi/drivers/
H A Dmite.c497 int tcr; local
501 tcr = readl(mite->mite_io_addr + MITE_TCR(mite_chan->channel));
503 return tcr;
/drivers/tty/serial/
H A Ddz.c811 unsigned short csr, tcr, trdy, mask; local
817 tcr = dz_in(dport, DZ_TCR);
818 tcr |= 1 << dport->port.line;
819 mask = tcr;
840 dz_out(dport, DZ_TCR, tcr);
H A Dsunsab.h17 u8 tcr; /* Termination Character Register */ member in struct:sab82532_async_rd_regs
48 u8 tcr; member in struct:sab82532_async_wr_regs
84 u8 tcr; member in struct:sab82532_async_rw_regs
/drivers/atm/
H A Dnicstar.c1239 int tcr, tcra; /* target cell rate, and absolute value */ local
1294 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1295 tcra = tcr >= 0 ? tcr : -tcr;
1306 if (tcr > 0) {
1309 } else if (tcr == 0) {
H A Didt77252.c2150 int tcr, tcra; local
2165 tcr = atm_pcr_goal(&qos->txtp);
2166 tcra = tcr >= 0 ? tcr : -tcr;
2174 if (tcr > 0) {
2177 } else if (tcr == 0) {
2219 int tcr; local
2229 tcr = atm_pcr_goal(&qos->txtp);
2230 if (tcr
[all...]
/drivers/net/can/
H A Drcar_can.c77 u8 tcr; /* Test Control Register */ member in struct:rcar_can_regs
/drivers/net/usb/
H A Drtl8150.c615 u8 cr, tcr, rcr, msr; local
622 tcr = 0xd8;
627 set_registers(dev, TCR, 1, &tcr);
/drivers/tty/
H A Dsynclink_gt.c4501 unsigned short tcr; local
4503 /* if preamble enabled (tcr[6] == 1) then tx idle size = 8 bits
4504 * else tcr[5:4] = tx idle size: 00 = 8 bits, 01 = 16 bits
4506 tcr = rd_reg16(info, TCR);
4509 tcr = (tcr & ~(BIT6 + BIT5)) | BIT4;
4512 } else if (!(tcr & BIT6)) {
4514 tcr &= ~(BIT5 + BIT4);
4516 wr_reg16(info, TCR, tcr);

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