/arch/um/include/shared/skas/ |
H A D | stub-data.h | 14 struct itimerval timer; member in struct:stub_data
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/arch/sh/include/asm/ |
H A D | heartbeat.h | 4 #include <linux/timer.h> 12 struct timer_list timer; member in struct:heartbeat_data
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/arch/arm/mach-omap1/include/mach/ |
H A D | mtd-xip.h | 33 volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr); local 34 return timer->read_tim; 54 * the system timer tick period. This should put the CPU into idle mode
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/arch/powerpc/boot/ |
H A D | serial.c | 38 int timer = 0, count; local 47 while (timer++ < 5*1000) { 70 break; /* Exit 'timer' loop */
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/arch/arm/lib/ |
H A D | delay.c | 77 void __init register_current_timer_delay(const struct delay_timer *timer) argument 82 clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq, 87 pr_info("Switching to timer-based delay loop, resolution %lluns\n", res); 88 delay_timer = timer; 89 lpj_fine = timer->freq / HZ;
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/arch/mips/include/asm/mach-rc32434/ |
H A D | timer.h | 2 * Definitions for timer registers 43 struct timer { struct
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/arch/powerpc/sysdev/ |
H A D | fsl_mpic_timer_wakeup.c | 2 * MPIC timer wakeup driver 23 struct mpic_timer *timer; member in struct:fsl_mpic_timer_wakeup 37 if (wakeup->timer) { 38 disable_irq_wake(wakeup->timer->irq); 39 mpic_free_timer(wakeup->timer); 42 wakeup->timer = NULL; 52 return wakeup->timer ? IRQ_HANDLED : IRQ_NONE; 63 if (fsl_wakeup->timer) { 64 mpic_get_remain_time(fsl_wakeup->timer, &interval); 86 if (fsl_wakeup->timer) { [all...] |
/arch/xtensa/kernel/ |
H A D | time.c | 83 struct ccount_timer *timer = local 87 * There is no way to disable the timer interrupt at the device level, 95 if (timer->irq_enabled) { 97 timer->irq_enabled = 0; 102 if (!timer->irq_enabled) { 104 timer->irq_enabled = 1; 115 .name = "timer", 120 struct ccount_timer *timer = &per_cpu(ccount_timer, cpu); local 121 struct clock_event_device *clockevent = &timer->evt; 123 timer [all...] |
/arch/arm/mach-footbridge/ |
H A D | dc21285.c | 189 struct timer_list *timer = dev_id; local 203 timer->expires = jiffies + HZ; 204 add_timer(timer); 211 printk(KERN_DEBUG "PCI: discard timer expired\n"); 233 struct timer_list *timer = dev_id; local 247 timer->expires = jiffies + HZ; 248 add_timer(timer); 344 "Discard timer", NULL);
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/arch/arm/mach-omap1/ |
H A D | time.c | 7 * Partial timer rewrite and additional dynamic tick timer support by 11 * MPU timer code based on the older MPU timer code for OMAP 74 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local 75 return readl(&timer->read_tim); 80 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local 82 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl); 87 omap_mpu_timer_regs_t __iomem *timer local 95 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local 110 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); local 191 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1); local [all...] |
/arch/mips/lasat/ |
H A D | picvue_proc.c | 17 #include <linux/timer.h> 30 static struct timer_list timer; variable in typeref:struct:timer_list 116 del_timer(&timer); 129 add_timer(&timer); 166 timer.expires = jiffies + scroll_interval; 167 add_timer(&timer); 178 del_timer_sync(&timer); 205 init_timer(&timer); 206 timer.function = pvc_proc_timerfunc;
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/arch/powerpc/oprofile/cell/ |
H A D | spu_profiler.c | 137 static enum hrtimer_restart profile_spus(struct hrtimer *timer) argument 186 hrtimer_forward(timer, timer->base->get_time(), kt); 190 printk(KERN_INFO "SPU_PROF: spu-prof timer ending\n"); 194 static struct hrtimer timer; variable in typeref:struct:hrtimer 206 pr_debug("timer resolution: %lu\n", TICK_NSEC); 208 hrtimer_init(&timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 209 hrtimer_set_expires(&timer, kt); 210 timer.function = profile_spus; 220 hrtimer_start(&timer, k [all...] |
/arch/s390/kernel/ |
H A D | vtime.c | 2 * Virtual cpu timer based timer functions. 28 u64 timer; local 30 asm volatile("stpt %0" : "=m" (timer)); 31 return timer; 36 u64 timer; local 39 " stpt %0\n" /* Store current cpu timer value */ 41 : "=m" (timer) : "m" (expires)); 42 S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; 63 u64 timer, cloc local 129 u64 timer, system; local 154 list_add_sorted(struct vtimer_list *timer, struct list_head *head) argument 172 struct vtimer_list *timer, *tmp; local 209 init_virt_timer(struct vtimer_list *timer) argument 216 vtimer_pending(struct vtimer_list *timer) argument 221 internal_add_vtimer(struct vtimer_list *timer) argument 240 __add_vtimer(struct vtimer_list *timer, int periodic) argument 253 add_virt_timer(struct vtimer_list *timer) argument 262 add_virt_timer_periodic(struct vtimer_list *timer) argument 268 __mod_vtimer(struct vtimer_list *timer, u64 expires, int periodic) argument 291 mod_virt_timer(struct vtimer_list *timer, u64 expires) argument 300 mod_virt_timer_periodic(struct vtimer_list *timer, u64 expires) argument 311 del_virt_timer(struct vtimer_list *timer) argument [all...] |
/arch/alpha/kernel/ |
H A D | srmcons.c | 15 #include <linux/timer.h> 34 struct timer_list timer; member in struct:srmcons_private 83 mod_timer(&srmconsp->timer, jiffies + incr); 169 mod_timer(&srmconsp->timer, jiffies + 10); 188 del_timer(&srmconsp->timer); 208 setup_timer(&srmcons_singleton.timer, srmcons_receive_chars,
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/arch/microblaze/kernel/ |
H A D | timer.c | 79 /* loading value to timer reg */ 85 /* see timer data sheet for detail 89 * ENT- enable timer itself 95 * UDT - set the timer as down counter 106 /* loading value to timer reg */ 176 .name = "timer", 200 /* reading actual value of timer 1 */ 253 static void __init xilinx_timer_init(struct device_node *timer) argument 265 timer_baseaddr = of_iomap(timer, 0); 267 pr_err("ERROR: invalid timer bas [all...] |
/arch/mips/cavium-octeon/ |
H A D | oct_ilm.c | 116 static void start_timer(int timer, u64 interval) argument 126 cvmx_write_csr(CVMX_CIU_TIMX(timer), timx.u64); 128 timx.u64 = cvmx_read_csr(CVMX_CIU_TIMX(timer)); 156 static void disable_timer(int timer) argument 162 cvmx_write_csr(CVMX_CIU_TIMX(timer), timx.u64); 163 /* Read it back to force immediate write of timer register*/ 164 timx.u64 = cvmx_read_csr(CVMX_CIU_TIMX(timer));
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/arch/mips/include/asm/mach-jz4740/ |
H A D | timer.h | 3 * JZ4740 platform timer support 64 static inline void jz4740_timer_stop(unsigned int timer) argument 66 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); 69 static inline void jz4740_timer_start(unsigned int timer) argument 71 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); 74 static inline bool jz4740_timer_is_enabled(unsigned int timer) argument 76 return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer); 79 static inline void jz4740_timer_enable(unsigned int timer) argument 81 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET); 84 static inline void jz4740_timer_disable(unsigned int timer) argument 89 jz4740_timer_set_period(unsigned int timer, uint16_t period) argument 94 jz4740_timer_set_duty(unsigned int timer, uint16_t duty) argument 99 jz4740_timer_set_count(unsigned int timer, uint16_t count) argument 104 jz4740_timer_get_count(unsigned int timer) argument 109 jz4740_timer_ack_full(unsigned int timer) argument 114 jz4740_timer_irq_full_enable(unsigned int timer) argument 120 jz4740_timer_irq_full_disable(unsigned int timer) argument 125 jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl) argument 130 jz4740_timer_get_ctrl(unsigned int timer) argument [all...] |
/arch/mips/lantiq/xway/ |
H A D | gptu.c | 34 /* timer control register */ 36 /* timer auto reload register */ 38 /* timer manual reload register */ 40 /* timer count register */ 77 int timer = irq - irqres[0].start; local 78 gptu_w32(1 << timer, GPTU_IRNCR); 123 unsigned int timer) 132 clk->bits = timer; 122 clkdev_add_gptu(struct device *dev, const char *con, unsigned int timer) argument
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/arch/s390/oprofile/ |
H A D | init.c | 51 timer, enumerator in enum:__force_cpu_type 57 if (!strcmp(str, "timer")) { 58 force_cpu_type = timer; 59 printk(KERN_INFO "oprofile: forcing timer to be returned " 69 "(report cpu_type \"timer\""); 122 * /dev/oprofile/hwsampling/hwsampler (cpu_type = timer) 168 * /dev/oprofile/hwsampling/hw_interval (cpu_type = timer) 316 * File ops used for: /dev/oprofile/timer/enabled 370 dir = oprofilefs_mkdir(root, "timer"); 411 * forced to timer i [all...] |
/arch/x86/boot/compressed/ |
H A D | aslr.c | 24 u16 status, timer; local 30 timer = inb(I8254_PORT_COUNTER0); 31 timer |= inb(I8254_PORT_COUNTER0) << 8; 34 return timer;
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/arch/x86/kernel/ |
H A D | apb_timer.c | 15 * The timer information, such as frequency and addresses, is provided to the 21 * - timer 0 - NR_CPUs for per cpu timer 22 * - one timer for clocksource 23 * - one timer for watchdog driver. 24 * It is also worth notice that APB timer does not support true one-shot mode, 26 * APB timer can also be used as broadcast timer along with per cpu local APIC 27 * timer, but by default APB timer ha 62 struct dw_apb_clock_event_device *timer; member in struct:apbt_dev [all...] |
/arch/x86/kvm/ |
H A D | i8254.h | 20 u8 gate; /* timer start */ 29 struct hrtimer timer; member in struct:kvm_kpit_state
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H A D | lapic.h | 12 struct hrtimer timer; member in struct:kvm_timer
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/arch/arm/include/asm/ |
H A D | kvm_host.h | 55 struct arch_timer_kvm timer; member in struct:kvm_arch
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/arch/arm/mach-omap2/ |
H A D | powerdomain.h | 105 * @timer: 144 s64 timer; member in struct:powerdomain
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