Searched defs:v3 (Results 1 - 16 of 16) sorted by relevance

/drivers/gpu/ipu-v3/
H A DMakefile1 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
3 imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
/drivers/clocksource/
H A Dacpi_pm.c43 u32 v1 = 0, v2 = 0, v3 = 0; local
54 v3 = read_pmtmr();
55 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1)
56 || (v3 > v1 && v3 < v2)));
H A Dsh_cmt.c287 unsigned long v1, v2, v3; local
297 v3 = sh_cmt_read_cmcnt(ch);
299 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
300 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
/drivers/staging/rtl8188eu/hal/
H A Dbb_cfg.c583 u32 v3 = array[i+2]; local
586 rtl_addr_delay(adapt, v1, v2, v3);
/drivers/net/ethernet/chelsio/cxgb3/
H A Dmc5.c101 u32 v3)
105 t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_ADDR2, v3);
109 u32 v3)
113 t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_DATA2, v3);
117 u32 *v3)
121 *v3 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA2);
100 dbgi_wr_addr3(struct adapter *adapter, u32 v1, u32 v2, u32 v3) argument
108 dbgi_wr_data3(struct adapter *adapter, u32 v1, u32 v2, u32 v3) argument
116 dbgi_rd_rsp3(struct adapter *adapter, u32 *v1, u32 *v2, u32 *v3) argument
/drivers/gpu/drm/radeon/
H A Datombios_crtc.c431 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member in union:atom_enable_ss
472 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0);
473 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK;
476 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL;
479 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL;
482 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL;
487 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount);
488 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step);
489 args.v3.ucEnable = enable;
545 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member in union:adjust_pixel_clock
746 PIXEL_CLOCK_PARAMETERS_V3 v3; member in union:set_pixel_clock
[all...]
H A Datombios_encoders.c810 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member in union:dig_encoder_control
864 args.v3.ucPanelMode = panel_mode;
896 args.v3.ucAction = action;
897 args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
899 args.v3.ucPanelMode = panel_mode;
901 args.v3.ucEncoderMode = atombios_get_encoder_mode(encoder);
903 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode))
904 args.v3.ucLaneNum = dp_lane_count;
906 args.v3.ucLaneNum = 8;
908 args.v3
964 DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3; member in union:dig_transmitter_control
1382 EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION_V3 v3; member in union:external_encoder_control
[all...]
H A Dradeon_atombios.c1485 struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; member in union:asic_ss_assignment
1563 if ((ss_assign->v3.ucClockIndication == id) &&
1564 (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) {
1566 le16_to_cpu(ss_assign->v3.usSpreadSpectrumPercentage);
1567 ss->type = ss_assign->v3.ucSpreadSpectrumMode;
1568 ss->rate = le16_to_cpu(ss_assign->v3.usSpreadRateIn10Hz);
1569 if (ss_assign->v3.ucSpreadSpectrumMode &
2783 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3; member in union:get_clock_dividers
2839 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
2843 dividers->post_div = args.v3
3057 struct _SET_VOLTAGE_PARAMETERS_V1_3 v3; member in union:set_voltage
3335 struct _ATOM_VOLTAGE_OBJECT_INFO_V3_1 v3; member in union:voltage_object_info
3341 union _ATOM_VOLTAGE_OBJECT_V3 v3; member in union:voltage_object
3378 atom_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT_INFO_V3_1 *v3, u8 voltage_type, u8 voltage_mode) argument
[all...]
/drivers/net/wireless/b43legacy/
H A Dphy.c1784 s8 v3; local
1812 v3 = (s8)((tmp & 0xFF00) >> 8);
1815 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1823 v3 = (s8)((tmp & 0xFF00) >> 8);
1824 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1829 v3 = (v3 + 0x20) & 0x3F;
1834 average = (v0 + v1 + v2 + v3 + 2) / 4;
H A Dmain.c439 u16 v3; local
445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
453 } while (v3 != test3 || v2 != test2 || v1 != test1);
455 *tsf = v3;
507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; local
511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
/drivers/net/wireless/rtlwifi/rtl8188ee/
H A Dphy.c673 u32 v1 = 0, v2 = 0, v3 = 0; local
682 v3 = phy_reg_page[i+2];
713 v3 = phy_reg_page[i+2];
719 v3 = phy_reg_page[i+2];
/drivers/net/wireless/rtlwifi/rtl8723be/
H A Dphy.c730 u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; local
739 v3 = phy_regarray_table_pg[i+2];
750 v1, v2, v3, v4, v5, v6);
/drivers/net/wireless/rtlwifi/rtl8192ee/
H A Dphy.c895 u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; local
904 v3 = phy_regarray_table_pg[i+2];
910 _rtl92ee_store_tx_power_by_rate(hw, v1, v2, v3,
/drivers/net/wireless/rtlwifi/rtl8821ae/
H A Dphy.c1919 u32 v1, v2, v3, v4, v5, v6; local
1937 v3 = array[i+2];
1963 _rtl8821ae_store_tx_power_by_rate(hw, v1, v2, v3,
1972 v3 = array[i+2];
1977 v3 = array[i+2];
/drivers/video/fbdev/sis/
H A Dsis_main.c4313 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; local
4331 v3 = 0x80; v6 = 0x80;
4343 v3 = bios[rindex++];
4352 SiS_SetReg(SISSR, 0x2a, v3);
4364 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a;
4370 v3 = bios[memtype + 16];
4378 v3 &= 0xfd;
4381 SiS_SetReg(SISSR, 0x17, v3);
4399 v1 = 0xf6; v2 = 0x0d; v3 = 0x00;
4403 v3
4847 u8 v1, v2, v3; local
4997 u8 v3; local
5072 u8 v1, v2, v3, v4, v5, reg, ramtype; local
[all...]
/drivers/net/wireless/brcm80211/brcmsmac/phy/
H A Dphy_n.c21353 u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; local
21366 1, 0x0C, 16, &v3);
21377 1, 0x1C, 16, &v3);

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