Searched defs:watermark_level (Results 1 - 4 of 4) sorted by relevance
/drivers/gpu/drm/radeon/ |
H A D | cypress_dpm.c | 678 u8 watermark_level) 689 level->displayWatermark = watermark_level; 675 cypress_convert_power_level_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, RV770_SMC_HW_PERFORMANCE_LEVEL *level, u8 watermark_level) argument
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H A D | rv770_dpm.c | 615 u8 watermark_level) 624 level->displayWatermark = watermark_level; 612 rv770_convert_power_level_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, RV770_SMC_HW_PERFORMANCE_LEVEL *level, u8 watermark_level) argument
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/drivers/dma/ |
H A D | imx-dma.c | 160 u32 watermark_level; member in struct:imxdma_channel 693 imxdmac->watermark_level = dmaengine_cfg->src_maxburst; 697 imxdmac->watermark_level = dmaengine_cfg->dst_maxburst; 726 imx_dmav1_writel(imxdma, imxdmac->watermark_level *
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H A D | imx-sdma.c | 265 unsigned long watermark_level; member in struct:sdma_channel 800 dev_dbg(sdma->dev, "wml = 0x%08x\n", (u32)sdmac->watermark_level); 818 context->gReg[7] = sdmac->watermark_level; 878 __set_bit(31, &sdmac->watermark_level); 881 __set_bit(30, &sdmac->watermark_level); 886 sdmac->watermark_level |= sdmac->watermark_level; 890 sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */ 1218 sdmac->watermark_level = dmaengine_cfg->src_maxburst * 1223 sdmac->watermark_level [all...] |
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