/arch/sh/drivers/pci/ |
H A D | ops-dreamcast.c | 49 static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 57 case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break; 58 case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break; 59 case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break; 65 static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument 71 case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break; 72 case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break; 73 case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
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H A D | ops-sh5.c | 25 static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where, argument 28 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); 32 *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3)); 35 *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2)); 45 static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where, argument 48 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); 52 SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val); 55 SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
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H A D | ops-sh4.c | 19 #define CONFIG_CMD(bus, devfn, where) \ 20 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) 26 int where, int size, u32 *val) 37 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 43 *val = (data >> ((where & 3) << 3)) & 0xff; 46 *val = (data >> ((where & 2) << 3)) & 0xffff; 64 int where, int size, u32 val) 72 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 78 shift = (where & 3) << 3; 83 shift = (where 25 sh4_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 63 sh4_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-sh7786.c | 23 struct pci_bus *bus, unsigned int devfn, int where, u32 *data) 31 reg = where & ~3; 93 int where, int size, u32 *val) 99 if ((size == 2) && (where & 1)) 101 else if ((size == 4) && (where & 3)) 106 devfn, where, &data); 113 *val = (data >> ((where & 3) << 3)) & 0xff; 115 *val = (data >> ((where & 2) << 3)) & 0xffff; 120 "where=0x%04x size=%d val=0x%08lx\n", bus->number, 121 devfn, where, siz 22 sh7786_pcie_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) argument 92 sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 128 sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
/arch/mips/pci/ |
H A D | ops-vr41xx.c | 36 unsigned int devfn, int where) 42 if (PCI_SLOT(devfn) < 11 || where > 0xff) 46 (where & 0xfc), PCICONFAREG); 51 if (where > 0xff) 55 (where & 0xfc) | 1U, PCICONFAREG); 61 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, argument 67 if (set_pci_configuration_address(bus->number, devfn, where) < 0) 74 *val = (data >> ((where & 3) << 3)) & 0xffU; 77 *val = (data >> ((where & 2) << 3)) & 0xffffU; 89 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, argument 35 set_pci_configuration_address(unsigned char number, unsigned int devfn, int where) argument [all...] |
H A D | ops-emma2rh.c | 62 unsigned int devfn, int where) 84 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, argument 99 if (set_pci_configuration_address(bus_num, devfn, where) < 0) 104 (where & 0xfffffffc)); 108 *val = (data >> ((where & 3) << 3)) & 0xffU; 111 *val = (data >> ((where & 2) << 3)) & 0xffffU; 129 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, argument 143 if (set_pci_configuration_address(bus_num, devfn, where) < 0) 149 (where & 0xfffffffc)); 153 shift = (where 61 set_pci_configuration_address(unsigned char bus_num, unsigned int devfn, int where) argument [all...] |
H A D | ops-lantiq.c | 29 unsigned int devfn, unsigned int where, u32 *data) 45 LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3); 74 int where, int size, u32 *val) 78 if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) 82 *val = (data >> ((where & 3) << 3)) & 0xff; 84 *val = (data >> ((where & 3) << 3)) & 0xffff; 92 int where, int size, u32 val) 100 devfn, where, &data)) 104 data = (data & ~(0xff << ((where & 3) << 3))) | 105 (val << ((where 28 ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data) argument 73 ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 91 ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-bonito64.c | 38 unsigned int devfn, int where, 47 int reg = where & ~3; 102 int where, int size, u32 * val) 106 if ((size == 2) && (where & 1)) 108 else if ((size == 4) && (where & 3)) 111 if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 116 *val = (data >> ((where & 3) << 3)) & 0xff; 118 *val = (data >> ((where & 3) << 3)) & 0xffff; 126 int where, int size, u32 val) 130 if ((size == 2) && (where 36 bonito64_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument 101 bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) argument 125 bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-bridge.c | 20 static u32 emulate_ioc3_cfg(int where, int size) argument 22 if (size == 1 && where == 0x3d) 24 else if (size == 2 && where == 0x3c) 26 else if (size == 4 && where == 0x3c) 44 int where, int size, u32 * value) 65 addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)]; 82 if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) { 83 *value = emulate_ioc3_cfg(where, siz 43 pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value) argument 103 pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value) argument 167 pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value) argument 176 pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument 242 pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument 310 pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument [all...] |
H A D | ops-gt64xxx_pci0.c | 43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 59 ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) | 104 int where, int size, u32 * val) 109 where, &data)) 113 *val = (data >> ((where & 3) << 3)) & 0xff; 115 *val = (data >> ((where & 3) << 3)) & 0xffff; 123 int where, int size, u32 val) 131 devfn, where, &data)) 135 data = (data & ~(0xff << ((where & 3) << 3))) | 136 (val << ((where 42 gt64xxx_pci0_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument 103 gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) argument 122 gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-loongson3.c | 17 int where, u32 *data) 24 int reg = where & ~3; 51 int where, int size, u32 *val) 55 bus, devfn, where, &data); 61 *val = (data >> ((where & 3) << 3)) & 0xff; 63 *val = (data >> ((where & 3) << 3)) & 0xffff; 71 int where, int size, u32 val) 80 bus, devfn, where, &data); 85 data = (data & ~(0xff << ((where & 3) << 3))) | 86 (val << ((where 15 loongson3_pci_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) argument 50 loongson3_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 70 loongson3_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-msc.c | 47 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 60 ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF))); 89 int where, int size, u32 * val) 93 if ((size == 2) && (where & 1)) 95 else if ((size == 4) && (where & 3)) 98 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 103 *val = (data >> ((where & 3) << 3)) & 0xff; 105 *val = (data >> ((where & 3) << 3)) & 0xffff; 113 int where, int size, u32 val) 117 if ((size == 2) && (where 46 msc_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) argument 88 msc_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) argument 112 msc_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-nile4.c | 19 struct pci_bus *bus, unsigned int devfn, int where, u32 *val) 33 vrc_pciregs[(0x200 + where) >> 2] = *val; 35 *val = vrc_pciregs[(0x200 + where) >> 2]; 54 | (where & ~3)); 57 (where & ~3); 77 int where, int size, u32 *val) 83 if ((size == 2) && (where & 1)) 85 else if ((size == 4) && (where & 3)) 89 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 97 *val = (data >> ((where 18 nile4_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *val) argument 76 nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 106 nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-rc32434.c | 48 unsigned char where, u32 *data) 54 PCI_CFG_SET(bus->number, slot, func, where); 73 int where, u8 *val) 78 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); 79 *val = (data >> ((where & 3) << 3)) & 0xff; 84 int where, u16 *val) 89 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); 90 *val = (data >> ((where & 3) << 3)) & 0xffff; 95 int where, u32 *val) 108 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, va 46 config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned char where, u32 *data) argument 72 read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val) argument 83 read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val) argument 94 read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 *val) argument 129 write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val) argument 148 write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val) argument 168 write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) argument 177 pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 190 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-tx3927.c | 48 static int mkaddr(struct pci_bus *bus, unsigned char devfn, unsigned char where) argument 56 (where & 0xfc) | (bus->parent ? 1 : 0); 77 int where, int size, u32 * val) 79 if (mkaddr(bus, devfn, where)) { 86 *val = *(volatile u8 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3)); 90 *val = le16_to_cpu(*(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3))); 102 int where, int size, u32 val) 104 if (mkaddr(bus, devfn, where)) 109 *(volatile u8 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3)) = val; 113 *(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where 76 tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) argument 101 tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | ops-loongson2.c | 37 unsigned int devfn, int where, 46 int reg = where & ~3; 122 int where, int size, u32 *val) 126 if ((size == 2) && (where & 1)) 128 else if ((size == 4) && (where & 3)) 131 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 136 *val = (data >> ((where & 3) << 3)) & 0xff; 138 *val = (data >> ((where & 3) << 3)) & 0xffff; 146 int where, int size, u32 val) 150 if ((size == 2) && (where 35 loongson_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) argument 121 loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 145 loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
/arch/sparc/kernel/ |
H A D | psycho_common.h | 22 int where) 26 PSYCHO_CONFIG_ENCODE(bus, devfn, where)); 19 psycho_pci_config_mkaddr(struct pci_pbm_info *pbm, unsigned char bus, unsigned int devfn, int where) argument
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/arch/alpha/kernel/ |
H A D | core_polaris.c | 66 mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where, argument 72 *pci_addr = (bus << 16) | (device_fn << 8) | (where) | 75 DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x," 77 bus, device_fn, where, *pci_addr)); 83 polaris_read_config(struct pci_bus *bus, unsigned int devfn, int where, argument 89 if (mk_conf_addr(bus, devfn, where, &addr, &type1)) 109 polaris_write_config(struct pci_bus *bus, unsigned int devfn, int where, argument 115 if (mk_conf_addr(bus, devfn, where, &addr, &type1))
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H A D | core_apecs.c | 92 mk_conf_addr(struct pci_bus *pbus, unsigned int device_fn, int where, argument 98 DBGC(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x," 100 bus, device_fn, where, pci_addr, type1)); 114 addr = (device_fn << 8) | (where); 118 addr = (bus << 16) | (device_fn << 8) | (where); 274 apecs_read_config(struct pci_bus *bus, unsigned int devfn, int where, argument 282 if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1)) 286 shift = (where & 3) * 8; 293 apecs_write_config(struct pci_bus *bus, unsigned int devfn, int where, argument 300 if (mk_conf_addr(bus, devfn, where, [all...] |
/arch/arm/mach-sa1100/ |
H A D | pci-nanoengine.c | 36 unsigned int devfn, int where, unsigned long *address) 42 ((bus->number << 16) | (devfn << 8) | (where & ~3)); 44 ret = (busnr > 255 || devfn > 255 || where > 255) ? 50 static int nanoengine_read_config(struct pci_bus *bus, unsigned int devfn, int where, argument 63 nanoengine_get_pci_address(bus, devfn, where, &address); 69 ret = nanoengine_get_pci_address(bus, devfn, where, &address); 76 v >>= ((where & 3) * 8); 84 static int nanoengine_write_config(struct pci_bus *bus, unsigned int devfn, int where, argument 93 shift = (where & 3) * 8; 97 ret = nanoengine_get_pci_address(bus, devfn, where, 35 nanoengine_get_pci_address(struct pci_bus *bus, unsigned int devfn, int where, unsigned long *address) argument [all...] |
/arch/powerpc/platforms/cell/ |
H A D | celleb_scc_epci.c | 113 struct pci_controller *hose, unsigned int devfn, int where) 121 | (where & 0xff) 125 (((devfn & 0xff) << 8) | (where & 0xff)); 133 unsigned int devfn, int where, int size, u32 *val) 140 BUG_ON(where % size); 149 addr = epci_base + where; 168 addr = celleb_epci_make_config_addr(bus, hose, devfn, where); 186 "addr=0x%p, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n", 187 addr, devfn, where, size, *val); 193 unsigned int devfn, int where, in 112 celleb_epci_make_config_addr(struct pci_bus *bus, struct pci_controller *hose, unsigned int devfn, int where) argument 132 celleb_epci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 192 celleb_epci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument [all...] |
/arch/arm/mach-dove/ |
H A D | pcie.c | 95 static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, argument 109 ret = orion_pcie_rd_conf(pp->base, bus, devfn, where, size, val); 116 int where, int size, u32 val) 127 ret = orion_pcie_wr_conf(pp->base, bus, devfn, where, size, val); 115 pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) argument
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/arch/arm/mach-footbridge/ |
H A D | dc21285.c | 63 dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where, argument 73 : "=r" (v) : "r" (addr), "r" (where) : "cc"); 77 : "=r" (v) : "r" (addr), "r" (where) : "cc"); 81 : "=r" (v) : "r" (addr), "r" (where) : "cc"); 97 dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where, argument 107 : : "r" (value), "r" (addr), "r" (where) 112 : : "r" (value), "r" (addr), "r" (where) 117 : : "r" (value), "r" (addr), "r" (where)
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/arch/arm/mach-ks8695/ |
H A D | pci.c | 44 static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where) argument 48 pbca = PBCA_ENABLE | (where & ~3); 70 unsigned int devfn, int where, int size, u32 *value) 72 ks8695_pci_setupconfig(bus->number, devfn, where); 80 *value = *value >> ((where & 2) * 8); 84 *value = *value >> ((where & 3) * 8); 91 bus->number, devfn, where, size, *value, 99 unsigned int devfn, int where, int size, u32 value) 105 bus->number, devfn, where, size, value); 108 ks8695_pci_setupconfig(bus->number, devfn, where); 69 ks8695_pci_readconfig(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) argument 98 ks8695_pci_writeconfig(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument 133 ks8695_local_writeconfig(int where, u32 value) argument [all...] |
/arch/arm/plat-iop/ |
H A D | pci.c | 39 static u32 iop3xx_cfg_address(struct pci_bus *bus, int devfn, int where) argument 49 addr |= PCI_FUNC(devfn) << 8 | (where & ~3); 58 * errors occur during a config cycle where there is no device, like during 113 iop3xx_read_config(struct pci_bus *bus, unsigned int devfn, int where, argument 116 unsigned long addr = iop3xx_cfg_address(bus, devfn, where); 117 u32 val = iop3xx_read(addr) >> ((where & 3) * 8); 128 iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where, argument 131 unsigned long addr = iop3xx_cfg_address(bus, devfn, where); 139 where = (where [all...] |