/arch/powerpc/boot/dts/ |
H A D | mpc866ads.dts | 19 #size-cells = <1>; 23 #size-cells = <0>; 28 d-cache-line-size = <16>; // 16 bytes 29 i-cache-line-size = <16>; // 16 bytes 30 d-cache-size = <0x2000>; // L1, 8K 31 i-cache-size = <0x4000>; // L1, 16K 48 #size-cells = <1>; 64 #size-cells = <1>; 74 #size-cells = <0>; 101 #size [all...] |
H A D | tqm5200.dts | 19 #size-cells = <1>; 24 #size-cells = <0>; 29 d-cache-line-size = <32>; 30 i-cache-line-size = <32>; 31 d-cache-size = <0x4000>; // L1, 16K 32 i-cache-size = <0x4000>; // L1, 16K 46 #size-cells = <1>; 141 #size-cells = <0>; 159 #size-cells = <0>; 179 #size [all...] |
H A D | tqm8xx.dts | 19 #size-cells = <1>; 30 #size-cells = <0>; 35 d-cache-line-size = <16>; // 16 bytes 36 i-cache-line-size = <16>; // 16 bytes 37 d-cache-size = <0x1000>; // L1, 4K 38 i-cache-size = <0x1000>; // L1, 4K 55 #size-cells = <1>; 67 #size-cells = <1>; 99 #size-cells = <1>; 107 #size [all...] |
/arch/sh/mm/ |
H A D | cache-sh2.c | 19 static void sh2__flush_wback_region(void *start, int size) argument 25 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) 40 static void sh2__flush_purge_region(void *start, int size) argument 46 end = ((unsigned long)start + size + L1_CACHE_BYTES-1) 54 static void sh2__flush_invalidate_region(void *start, int size) argument 77 end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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/arch/x86/kernel/ |
H A D | pci-swiotlb.c | 17 void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size, argument 23 vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags, 28 return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags); 31 void x86_swiotlb_free_coherent(struct device *dev, size_t size, argument 36 swiotlb_free_coherent(dev, size, vaddr, dma_addr); 38 dma_generic_free_coherent(dev, size, vaddr, dma_addr, attrs);
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/arch/x86/mm/ |
H A D | ioremap.c | 31 int ioremap_change_attr(unsigned long vaddr, unsigned long size, argument 34 unsigned long nrpages = size >> PAGE_SHIFT; 78 unsigned long size, unsigned long prot_val, void *caller) 83 const unsigned long unaligned_size = size; 91 /* Don't allow wraparound or zero size */ 92 last_addr = phys_addr + size - 1; 93 if (!size || last_addr < phys_addr) 113 ram_region = region_is_ram(phys_addr, size); 134 size = PAGE_ALIGN(last_addr+1) - phys_addr; 136 retval = reserve_memtype(phys_addr, (u64)phys_addr + size, 77 __ioremap_caller(resource_size_t phys_addr, unsigned long size, unsigned long prot_val, void *caller) argument 226 ioremap_nocache(resource_size_t phys_addr, unsigned long size) argument 252 ioremap_wc(resource_size_t phys_addr, unsigned long size) argument 262 ioremap_cache(resource_size_t phys_addr, unsigned long size) argument 269 ioremap_prot(resource_size_t phys_addr, unsigned long size, unsigned long prot_val) argument [all...] |
H A D | testmmiotrace.c | 78 static void do_test(unsigned long size) argument 80 void __iomem *p = ioremap_nocache(mmio_address, size); 88 if (read_far && read_far < size - 4) 116 unsigned long size = (read_far) ? (8 << 20) : (16 << 10); local 126 size >> 10, mmio_address); 127 do_test(size);
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/arch/arm/boot/dts/ |
H A D | bcm4708.dtsi | 17 #size-cells = <0>;
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H A D | hip04-d01.dts | 17 #size-cells = <2>;
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H A D | meson6.dtsi | 58 #size-cells = <0>;
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H A D | r8a7794-alt.dts | 33 #size-cells = <1>;
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H A D | sh7372.dtsi | 18 #size-cells = <0>;
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/arch/arm/plat-orion/include/plat/ |
H A D | addr-map.h | 38 const u32 size; member in struct:orion_addr_map_info 49 const u32 size, const u8 target,
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/arch/blackfin/include/asm/ |
H A D | flat.h | 28 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
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/arch/cris/arch-v32/drivers/ |
H A D | axisflashmap.c | 84 * The size field is the total size where the flash chips may be mapped on the 95 .size = MEM_CSE0_SIZE, 111 .size = MEM_CSE1_SIZE, 138 .size = CONFIG_ETRAX_PTABLE_SECTOR, 143 .size = 0, 148 .size = 0, 153 .size = 0, 158 .size = 0, 163 .size [all...] |
/arch/hexagon/include/asm/ |
H A D | cmpxchg.h | 29 * @size: size of the value 37 int size) 42 if (size != 4) do { asm volatile("brkpt;\n"); } while (1); 36 __xchg(unsigned long x, volatile void *ptr, int size) argument
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/arch/m32r/lib/ |
H A D | usercopy.c | 136 #define __do_clear_user(addr,size) \ 172 : "=&r"(__dst), "=&r"(size), "=&r"(__c) \ 173 : "0"(addr), "1"(size), "2"(size / 4), "r"(0) \ 179 #define __do_clear_user(addr,size) \ 216 : "=&r"(__dst), "=&r"(size), "=&r"(__c) \ 217 : "0"(addr), "1"(size), "2"(size / 4), "r"(0) \ 239 * Return the size of a string (including the ending 0)
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/arch/m68k/atari/ |
H A D | stram.c | 37 * configurable size, set aside on ST-RAM init. 102 pr_debug("atari_stram pool: size = %lu bytes, resource = %pR\n", 126 pr_debug("atari_stram pool: size = %lu bytes, resource = %pR\n", 150 void *atari_stram_alloc(unsigned long size, const char *owner) argument 155 pr_debug("atari_stram_alloc: allocate %lu bytes\n", size); 158 size = PAGE_ALIGN(size); 165 error = allocate_resource(&stram_pool, res, size, 0, UINT_MAX, 184 unsigned long size; local 193 size [all...] |
/arch/metag/tbx/ |
H A D | tbilogf.S | 29 .size ___TBILogF,.-___TBILogF 44 .size ___TBICont,.-___TBICont
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/arch/microblaze/include/asm/ |
H A D | setup.h | 47 extern void *alloc_maybe_bootmem(size_t size, gfp_t mask); 48 extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
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H A D | uaccess.h | 80 static inline int ___range_ok(unsigned long addr, unsigned long size) argument 83 ((addr + size - 1) > (memory_start + memory_size - 1))); 86 #define __range_ok(addr, size) \ 87 ___range_ok((unsigned long)(addr), (unsigned long)(size)) 89 #define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0) 94 unsigned long size) 96 if (!size) 100 (get_fs().seg < ((unsigned long)addr + size - 1))) { 101 pr_devel("ACCESS fail: %s at 0x%08x (size 93 access_ok(int type, const void __user *addr, unsigned long size) argument [all...] |
/arch/mips/include/asm/mach-bcm63xx/ |
H A D | ioremap.h | 6 static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) argument 35 static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, argument
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/arch/mips/mti-sead3/ |
H A D | sead3-mtd.c | 16 .size = 0x01fc0000, 20 .size = 0x00040000,
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/arch/mips/pci/ |
H A D | ops-sni.c | 41 int size, u32 * val) 48 switch (size) { 64 int size, u32 val) 71 switch (size) { 101 int size, u32 * val) 123 switch (size) { 138 int size, u32 val) 145 switch (size) { 40 pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 * val) argument 63 pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) argument 100 pcit_read(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 * val) argument 137 pcit_write(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) argument
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/arch/mips/txx9/generic/ |
H A D | 7segled.c | 42 const char *buf, size_t size) 46 return size; 51 const char *buf, size_t size) 55 return size; 71 const char *buf, size_t size) 73 if (size != sizeof(txx9_seg7map)) 75 memcpy(&txx9_seg7map, buf, size); 76 return size; 40 ascii_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) argument 49 raw_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) argument 69 map_seg7_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) argument
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