Searched refs:val (Results 151 - 175 of 1331) sorted by relevance

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/arch/mips/pci/
H A Dops-rc32434.c73 int where, u8 *val)
79 *val = (data >> ((where & 3) << 3)) & 0xff;
84 int where, u16 *val)
90 *val = (data >> ((where & 3) << 3)) & 0xffff;
95 int where, u32 *val)
108 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val);
130 u8 val)
138 (val << ((where & 3) << 3));
149 u16 val)
157 (val << ((wher
72 read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val) argument
83 read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val) argument
94 read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 *val) argument
129 write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val) argument
148 write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val) argument
168 write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) argument
177 pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument
190 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A Dops-nile4.c19 struct pci_bus *bus, unsigned int devfn, int where, u32 *val)
33 vrc_pciregs[(0x200 + where) >> 2] = *val;
35 *val = vrc_pciregs[(0x200 + where) >> 2];
60 *(u32 *) adr = *val;
62 *val = *(u32 *) adr;
77 int where, int size, u32 *val)
97 *val = (data >> ((where & 3) << 3)) & 0xff;
99 *val = (data >> ((where & 3) << 3)) & 0xffff;
101 *val = data;
107 int where, int size, u32 val)
18 nile4_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *val) argument
76 nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument
106 nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A Dops-vr41xx.c62 int size, uint32_t *val)
66 *val = 0xffffffffU;
74 *val = (data >> ((where & 3) << 3)) & 0xffU;
77 *val = (data >> ((where & 2) << 3)) & 0xffffU;
80 *val = data;
90 int size, uint32_t val)
104 data |= ((val & 0xffU) << shift);
109 data |= ((val & 0xffffU) << shift);
112 data = val;
61 pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, uint32_t *val) argument
89 pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, uint32_t val) argument
/arch/powerpc/boot/
H A Dep405.c29 u64 val; local
35 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
39 ibm405gp_fixup_clocks(val, 0xa8c000);
43 if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, &val)) {
51 reg[2] = (val << 10) & 0xffffffff;
H A Dep8248e.c25 u64 val; local
30 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
35 pq2_fixup_clocks(val);
H A Dep88xc.c23 u64 val; local
28 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
33 mpc885_fixup_clocks(val);
/arch/sparc/kernel/
H A Djump_label.c16 u32 val; local
24 val = 0x10680000 | ((u32) off >> 2);
27 val = 0x10800000 | ((u32) off >> 2);
30 val = 0x01000000;
35 *insn = val;
H A Dpcr.c56 u64 val; local
59 __asm__ __volatile__("rd %%pcr, %0" : "=r" (val));
60 return val;
63 static void direct_pcr_write(unsigned long reg_num, u64 val) argument
66 __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (val));
71 u64 val; local
74 __asm__ __volatile__("rd %%pic, %0" : "=r" (val));
75 return val;
78 static void direct_pic_write(unsigned long reg_num, u64 val) argument
90 "rd %%pic, %%g0" : : "r" (val));
110 n2_pcr_write(unsigned long reg_num, u64 val) argument
145 unsigned long val; local
152 n4_pcr_write(unsigned long reg_num, u64 val) argument
159 unsigned long val; local
168 n4_pic_write(unsigned long reg_num, u64 val) argument
196 unsigned long val; local
203 n5_pcr_write(unsigned long reg_num, u64 val) argument
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/arch/arm/mach-bcm/
H A Dboard_bcm2835.c57 u32 val; local
64 val = readl_relaxed(wdt_regs + PM_RSTC);
65 val &= ~PM_RSTC_WRCFG_MASK;
66 val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
67 writel_relaxed(val, wdt_regs + PM_RSTC);
80 u32 val; local
87 val = readl_relaxed(wdt_regs + PM_RSTS);
88 val &= ~PM_RSTC_WRCFG_MASK;
89 val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;
90 writel_relaxed(val, wdt_reg
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/arch/mips/include/asm/netlogic/
H A Dmips-extns.h48 #define write_c0_eimr(val) \
59 : : "r" (val)); \
61 __write_64bit_c0_register($9, 7, (val)); \
121 uint64_t val; local
124 val = __read_64bit_c0_register($9, 6) & __read_64bit_c0_register($9, 7);
137 : "=r" (val));
139 return val;
197 #define __write_64bit_c2_split(source, sel, val) \
211 : : "r" (val)); \
221 : : "r" (val)); \
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/arch/powerpc/include/asm/
H A Dio-defs.h9 DEF_PCI_AC_NORET(writeb, (u8 val, PCI_IO_ADDR addr), (val, addr), mem, addr)
10 DEF_PCI_AC_NORET(writew, (u16 val, PCI_IO_ADDR addr), (val, addr), mem, addr)
11 DEF_PCI_AC_NORET(writel, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr)
12 DEF_PCI_AC_NORET(writew_be, (u16 val, PCI_IO_ADDR addr), (val, addr), mem, addr)
13 DEF_PCI_AC_NORET(writel_be, (u32 val, PCI_IO_ADDR addr), (val, add
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H A Dfeature-fixups.h40 #define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
47 FTR_ENTRY_LONG val; \
62 #define END_FTR_SECTION_NESTED(msk, val, label) \
64 MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
66 #define END_FTR_SECTION(msk, val) \
67 END_FTR_SECTION_NESTED(msk, val, 97)
74 #define ALT_FTR_SECTION_END_NESTED(msk, val, label) \
75 MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
80 #define ALT_FTR_SECTION_END(msk, val) \
81 ALT_FTR_SECTION_END_NESTED(msk, val, 9
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/arch/x86/include/asm/
H A Dmsr.h49 #define DECLARE_ARGS(val, low, high) unsigned low, high
50 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
51 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
52 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
54 #define DECLARE_ARGS(val, low, high) unsigned long long val
55 #define EAX_EDX_VAL(val, low, high) (val)
56 #define EAX_EDX_ARGS(val, low, high) "A" (val)
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/arch/arm/mach-netx/
H A Dgeneric.c94 unsigned int val, irq; local
96 val = readl(NETX_DPMAS_IF_CONF1);
102 val |= (1 << 26) << irq;
106 val &= ~((1 << 26) << irq);
110 val &= ~((1 << 26) << irq);
114 val |= (1 << 26) << irq;
117 writel(val, NETX_DPMAS_IF_CONF1);
125 unsigned int val, irq; local
130 val = readl(NETX_DPMAS_INT_EN);
131 val
140 unsigned int val, irq; local
152 unsigned int val, irq; local
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/arch/blackfin/kernel/
H A Dpseudodbg.c42 long *val = &fp->r0; local
52 val -= (reg + 8 * grp);
54 val = &fp->usp;
56 val = &fp->fp;
58 val = &fp->i0;
59 val -= reg;
61 val = &fp->l0;
62 val -= (reg - 4);
64 val = &fp->b0;
65 val
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/arch/arm/kernel/
H A Dperf_event_xscale.c99 u32 val; local
100 asm volatile("mrc p14, 0, %0, c0, c0, 0" : "=r" (val));
101 return val;
105 xscale1pmu_write_pmnc(u32 val) argument
108 val &= 0xffff77f;
109 asm volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (val));
198 unsigned long val, mask, evt, flags; local
225 val = xscale1pmu_read_pmnc();
226 val &= ~mask;
227 val |
234 unsigned long val, mask, evt, flags; local
289 unsigned long flags, val; local
301 unsigned long flags, val; local
315 u32 val = 0; local
332 xscale1pmu_write_counter(struct perf_event *event, u32 val) argument
397 u32 val; local
404 xscale2pmu_write_pmnc(u32 val) argument
414 u32 val; local
420 xscale2pmu_write_overflow_flags(u32 val) argument
428 u32 val; local
434 xscale2pmu_write_event_select(u32 val) argument
442 u32 val; local
448 xscale2pmu_write_int_enable(u32 val) argument
653 unsigned long flags, val; local
665 unsigned long flags, val; local
679 u32 val = 0; local
702 xscale2pmu_write_counter(struct perf_event *event, u32 val) argument
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/arch/parisc/include/asm/
H A Dfutex.h38 u32 val; local
65 val = oldval + oparg;
66 ret = put_user(val, uaddr);
73 val = oldval | oparg;
74 ret = put_user(val, uaddr);
81 val = oldval & ~oparg;
82 ret = put_user(val, uaddr);
89 val = oldval ^ oparg;
90 ret = put_user(val, uaddr);
121 u32 val; local
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/arch/arm/mach-davinci/
H A Dcpuidle.c33 u32 val; local
35 val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);
39 val |= DDR2_SRPD_BIT;
41 val &= ~DDR2_SRPD_BIT;
42 val |= DDR2_LPMODEN_BIT;
44 val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
47 __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
/arch/arm/mach-omap1/
H A Docpi.c61 unsigned int val; local
67 val = omap_readl(OCPI_PROT);
68 val &= ~0xff;
69 /* val &= (1 << 0); Allow access only to EMIFS */
70 omap_writel(val, OCPI_PROT);
72 val = omap_readl(OCPI_SEC);
73 val &= ~0xff;
74 omap_writel(val, OCPI_SEC);
/arch/blackfin/include/mach-common/
H A Dpll.h53 static inline void _bfin_write_pll_relock(u32 addr, unsigned int val) argument
57 if (val == bfin_read_PLL_CTL())
64 bfin_write16(addr, val);
73 static inline void bfin_write_PLL_CTL(unsigned int val) argument
75 _bfin_write_pll_relock(PLL_CTL, val);
79 static inline void bfin_write_VR_CTL(unsigned int val) argument
81 _bfin_write_pll_relock(VR_CTL, val);
/arch/c6x/platforms/
H A Demif.c49 u32 val; local
61 err = of_property_read_u32_array(node, "ti,dscr-dev-enable", &val, 1);
63 dscr_set_devstate(val, DSCR_DEVSTATE_ENABLED);
75 err = of_property_read_u32_array(node, "ti,emifa-burst-priority", &val, 1);
77 soc_writel(val, &regs->bprio);
79 err = of_property_read_u32_array(node, "ti,emifa-async-wait-control", &val, 1);
81 soc_writel(val, &regs->awcc);
/arch/microblaze/include/asm/
H A Dsyscall.h36 int error, long val)
41 regs->r3 = val;
62 unsigned long val)
66 regs->r10 = val;
68 regs->r9 = val;
70 regs->r8 = val;
72 regs->r7 = val;
74 regs->r6 = val;
76 regs->r5 = val;
34 syscall_set_return_value(struct task_struct *task, struct pt_regs *regs, int error, long val) argument
60 microblaze_set_syscall_arg(struct pt_regs *regs, unsigned int n, unsigned long val) argument
/arch/alpha/include/asm/
H A Dword-at-a-time.h20 /* Return nonzero if val has a zero */
21 static inline unsigned long has_zero(unsigned long val, unsigned long *bits, const struct word_at_a_time *c) argument
23 unsigned long zero_locations = __kernel_cmpbge(0, val);
28 static inline unsigned long prep_zero_mask(unsigned long val, unsigned long bits, const struct word_at_a_time *c) argument
/arch/arm/mach-iop13xx/include/mach/
H A Dirqs.h11 u32 val; local
12 asm volatile("mrc p6, 0, %0, c0, c3, 0":"=r" (val));
13 return val;
20 u32 val; local
21 asm volatile("mrc p6, 0, %0, c1, c3, 0":"=r" (val));
22 return val;
29 u32 val; local
30 asm volatile("mrc p6, 0, %0, c2, c3, 0":"=r" (val));
31 return val;
38 u32 val; local
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/arch/mips/netlogic/xlp/
H A Dusb-init.c72 uint32_t val; local
76 val = nlm_read_usb_reg(port_addr, USB_INT_EN);
77 val = USB_CTRL_INTERRUPT_EN | USB_OHCI_INTERRUPT_EN |
79 nlm_write_usb_reg(port_addr, USB_INT_EN, val);
85 uint32_t val; local
89 val = nlm_read_usb_reg(port_addr, USB_PHY_0);
90 val &= ~(USB_PHY_RESET | USB_PHY_PORT_RESET_0 | USB_PHY_PORT_RESET_1);
91 nlm_write_usb_reg(port_addr, USB_PHY_0, val);
94 val = nlm_read_usb_reg(port_addr, USB_CTL_0);
95 val
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